9#ifndef LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
10#define LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
34 void trace(
bool On) { Trace = On; }
35 bool trace()
const {
return Trace; }
38 using EqualityMap = std::map<RegisterRef, RegisterRef, RegisterRefLess>;
48 std::map<RegisterRef, std::map<NodeId, NodeId>,
RegisterRefLess> RDefMap;
50 std::map<NodeId, EqualityMap> CopyMap;
51 std::vector<NodeId> Copies;
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Representation of each machine instruction.
This is an optimization pass for GlobalISel generic memory operations.
CopyPropagation(DataFlowGraph &dfg)
std::map< RegisterRef, RegisterRef, RegisterRefLess > EqualityMap
virtual bool interpretAsCopy(const MachineInstr *MI, EqualityMap &EM)
virtual ~CopyPropagation()=default
std::unordered_map< RegisterId, DefStack > DefStackMap