LLVM 20.0.0git
SPIRVRegisterBankInfo.cpp
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1//===- SPIRVRegisterBankInfo.cpp ------------------------------*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the targeting of the RegisterBankInfo class for SPIR-V.
10//
11//===----------------------------------------------------------------------===//
12
14#include "SPIRVRegisterInfo.h"
15#include "llvm/ADT/Twine.h"
17
18#define GET_REGINFO_ENUM
19#include "SPIRVGenRegisterInfo.inc"
20
21#define GET_TARGET_REGBANK_IMPL
22#include "SPIRVGenRegisterBank.inc"
23
24using namespace llvm;
25
26// This required for .td selection patterns to work or we'd end up with RegClass
27// checks being redundant as all the classes would be mapped to the same bank.
28const RegisterBank &
30 LLT Ty) const {
31 if (RC.getID() == SPIRV::TYPERegClassID)
32 return SPIRV::TYPERegBank;
33 return SPIRV::IDRegBank;
34}
This class implements the register bank concept.
Definition: RegisterBank.h:28
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
unsigned getID() const
Return the register class ID number.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18