Classes
struct	ArmConfig
	JITLink sub-arch configuration for Arm CPU models. More...

struct	ArmRelocation

struct	FixupInfo
	Collection of named constants per fixup kind. More...

struct	FixupInfo< Arm_Call >

struct	FixupInfo< Arm_Jump24 >

struct	FixupInfo< Arm_MovtAbs >

struct	FixupInfo< Arm_MovwAbsNC >

struct	FixupInfo< Thumb_Call >

struct	FixupInfo< Thumb_Jump24 >

struct	FixupInfo< Thumb_MovtAbs >

struct	FixupInfo< Thumb_MovwAbsNC >

struct	HalfWords
	Immutable pair of halfwords, Hi and Lo, with overflow check. More...

class	StubsManager
	Stubs builder for a specific StubsFlavor. More...

struct	ThumbRelocation

struct	WritableArmRelocation

struct	WritableThumbRelocation
	32-bit Thumb instructions are stored as two little-endian halfwords. More...

Enumerations
enum	EdgeKind_aarch32 : Edge::Kind { FirstDataRelocation = Edge::FirstRelocation , Data_Delta32 = FirstDataRelocation , Data_Pointer32 , LastDataRelocation = Data_Pointer32 , FirstArmRelocation , Arm_Call = FirstArmRelocation , Arm_Jump24 , Arm_MovwAbsNC , Arm_MovtAbs , LastArmRelocation = Arm_MovtAbs , FirstThumbRelocation , Thumb_Call = FirstThumbRelocation , Thumb_Jump24 , Thumb_MovwAbsNC , Thumb_MovtAbs , LastThumbRelocation = Thumb_MovtAbs }
	JITLink-internal AArch32 fixup kinds. More...

enum	TargetFlags_aarch32 : TargetFlagsType { ThumbSymbol = 1 << 0 }
	Flags enum for AArch32-specific symbol properties. More...

enum	StubsFlavor { Unsupported = 0 , Thumbv7 }
	AArch32 uses stubs for a number of purposes, like branch range extension or interworking between Arm and Thumb instruction subsets. More...

Functions
bool	hasTargetFlags (Symbol &Sym, TargetFlagsType Flags)
	Check whether the given target flags are set for this Symbol.

const char *	getCPUArchName (ARMBuildAttrs::CPUArch K)
	Human-readable name for a given CPU architecture kind.

const char *	getEdgeKindName (Edge::Kind K)
	Get a human-readable name for the given AArch32 edge kind.

ArmConfig	getArmConfigForCPUArch (ARMBuildAttrs::CPUArch CPUArch)
	Obtain the sub-arch configuration for a given Arm CPU model.

Expected< int64_t >	readAddendData (LinkGraph &G, Block &B, const Edge &E)
	Helper function to read the initial addend for Data-class relocations.

Expected< int64_t >	readAddendArm (LinkGraph &G, Block &B, const Edge &E)
	Helper function to read the initial addend for Arm-class relocations.

Expected< int64_t >	readAddendThumb (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
	Helper function to read the initial addend for Thumb-class relocations.

Expected< int64_t >	readAddend (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
	Read the initial addend for a REL-type relocation.

Error	applyFixupData (LinkGraph &G, Block &B, const Edge &E)
	Helper function to apply the fixup for Data-class relocations.

Error	applyFixupArm (LinkGraph &G, Block &B, const Edge &E)
	Helper function to apply the fixup for Arm-class relocations.

Error	applyFixupThumb (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
	Helper function to apply the fixup for Thumb-class relocations.

Error	applyFixup (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg)
	Apply fixup expression for edge to block content.

HalfWords	encodeImmBT4BlT1BlxT2 (int64_t Value)
	Encode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

int64_t	decodeImmBT4BlT1BlxT2 (uint32_t Hi, uint32_t Lo)
	Decode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

HalfWords	encodeImmBT4BlT1BlxT2_J1J2 (int64_t Value)
	Encode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).

int64_t	decodeImmBT4BlT1BlxT2_J1J2 (uint32_t Hi, uint32_t Lo)
	Decode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).

uint32_t	encodeImmBA1BlA1BlxA2 (int64_t Value)
	Encode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).

int64_t	decodeImmBA1BlA1BlxA2 (int64_t Value)
	Decode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).

HalfWords	encodeImmMovtT1MovwT3 (uint16_t Value)
	Encode 16-bit immediate value for move instruction formats MOVT T1 and MOVW T3.

uint16_t	decodeImmMovtT1MovwT3 (uint32_t Hi, uint32_t Lo)
	Decode 16-bit immediate value from move instruction formats MOVT T1 and MOVW T3.

HalfWords	encodeRegMovtT1MovwT3 (int64_t Value)
	Encode register ID for instruction formats MOVT T1 and MOVW T3.

int64_t	decodeRegMovtT1MovwT3 (uint32_t Hi, uint32_t Lo)
	Decode register ID from instruction formats MOVT T1 and MOVW T3.

uint32_t	encodeImmMovtA1MovwA2 (uint16_t Value)
	Encode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

uint16_t	decodeImmMovtA1MovwA2 (uint64_t Value)
	Decode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

uint32_t	encodeRegMovtA1MovwA2 (int64_t Value)
	Encode register ID for instruction formats MOVT A1 and MOVW A2.

int64_t	decodeRegMovtA1MovwA2 (uint64_t Value)
	Decode register ID for instruction formats MOVT A1 and MOVW A2.

Error	makeUnexpectedOpcodeError (const LinkGraph &G, const ThumbRelocation &R, Edge::Kind Kind)

Error	makeUnexpectedOpcodeError (const LinkGraph &G, const ArmRelocation &R, Edge::Kind Kind)

template<EdgeKind_aarch32 Kind>
bool	checkOpcode (const ThumbRelocation &R)

template<EdgeKind_aarch32 Kind>
bool	checkOpcode (const ArmRelocation &R)

template<EdgeKind_aarch32 Kind>
bool	checkRegister (const ThumbRelocation &R, HalfWords Reg)

template<EdgeKind_aarch32 Kind>
bool	checkRegister (const ArmRelocation &R, uint32_t Reg)

template<EdgeKind_aarch32 Kind>
void	writeRegister (WritableThumbRelocation &R, HalfWords Reg)

template<EdgeKind_aarch32 Kind>
void	writeRegister (WritableArmRelocation &R, uint32_t Reg)

template<EdgeKind_aarch32 Kind>
void	writeImmediate (WritableThumbRelocation &R, HalfWords Imm)

template<EdgeKind_aarch32 Kind>
void	writeImmediate (WritableArmRelocation &R, uint32_t Imm)

Variables
const uint8_t	Thumbv7ABS []

Enumeration Type Documentation

◆ EdgeKind_aarch32

enum llvm::jitlink::aarch32::EdgeKind_aarch32 : Edge::Kind

JITLink-internal AArch32 fixup kinds.

Enumerator
FirstDataRelocation	Relocations of class Data respect target endianness (unless otherwise specified)
Data_Delta32	Relative 32-bit value relocation.
Data_Pointer32	Absolute 32-bit value relocation.
LastDataRelocation
FirstArmRelocation	Relocations of class Arm (covers fixed-width 4-byte instruction subset)
Arm_Call	Write immediate value for unconditional PC-relative branch with link. We patch the instruction opcode to account for an instruction-set state switch: we use the bl instruction to stay in ARM and the blx instruction to switch to Thumb.
Arm_Jump24	Write immediate value for conditional PC-relative branch without link. If the branch target is not ARM, we are forced to generate an explicit interworking stub.
Arm_MovwAbsNC	Write immediate value to the lower halfword of the destination register.
Arm_MovtAbs	Write immediate value to the top halfword of the destination register.
LastArmRelocation
FirstThumbRelocation	Relocations of class Thumb16 and Thumb32 (covers Thumb instruction subset)
Thumb_Call	Write immediate value for unconditional PC-relative branch with link. We patch the instruction opcode to account for an instruction-set state switch: we use the bl instruction to stay in Thumb and the blx instruction to switch to ARM.
Thumb_Jump24	Write immediate value for PC-relative branch without link. The instruction can be made conditional by an IT block. If the branch target is not ARM, we are forced to generate an explicit interworking stub.
Thumb_MovwAbsNC	Write immediate value to the lower halfword of the destination register.
Thumb_MovtAbs	Write immediate value to the top halfword of the destination register.
LastThumbRelocation

Definition at line 30 of file aarch32.h.

◆ StubsFlavor

enum llvm::jitlink::aarch32::StubsFlavor

AArch32 uses stubs for a number of purposes, like branch range extension or interworking between Arm and Thumb instruction subsets.

Stub implementations vary depending on CPU architecture (v4, v6, v7), instruction subset and branch type (absolute/PC-relative).

For each kind of stub, the StubsFlavor defines one concrete form that is used throughout the LinkGraph.

Stubs are often called "veneers" in the official docs and online.

Enumerator
Unsupported
Thumbv7

Definition at line 117 of file aarch32.h.

◆ TargetFlags_aarch32

enum llvm::jitlink::aarch32::TargetFlags_aarch32 : TargetFlagsType

Flags enum for AArch32-specific symbol properties.

Enumerator
ThumbSymbol

Definition at line 96 of file aarch32.h.

Function Documentation

◆ applyFixup()

Error llvm::jitlink::aarch32::applyFixup	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E,
		const ArmConfig &	ArmCfg
	)

inline

Apply fixup expression for edge to block content.

Definition at line 258 of file aarch32.h.

References applyFixupArm(), applyFixupData(), applyFixupThumb(), B, E, G, LastArmRelocation, LastDataRelocation, LastThumbRelocation, and llvm_unreachable.

◆ applyFixupArm()

Error llvm::jitlink::aarch32::applyFixupArm	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E
	)

Helper function to apply the fixup for Arm-class relocations.

Definition at line 448 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, B, E, encodeImmBA1BlA1BlxA2(), encodeImmMovtA1MovwA2(), G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), hasTargetFlags(), LLVM_LIKELY, llvm::jitlink::makeTargetOutOfRangeError(), makeUnexpectedOpcodeError(), llvm::Error::success(), and ThumbSymbol.

Referenced by applyFixup().

◆ applyFixupData()

Error llvm::jitlink::aarch32::applyFixupData	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E
	)

Helper function to apply the fixup for Data-class relocations.

Definition at line 400 of file aarch32.cpp.

References assert(), B, Data_Delta32, Data_Pointer32, E, Endian, G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), LLVM_LIKELY, llvm::jitlink::makeTargetOutOfRangeError(), and llvm::Error::success().

Referenced by applyFixup().

◆ applyFixupThumb()

Error llvm::jitlink::aarch32::applyFixupThumb	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E,
		const ArmConfig &	ArmCfg
	)

Helper function to apply the fixup for Thumb-class relocations.

Definition at line 527 of file aarch32.cpp.

References llvm::alignTo(), assert(), B, E, encodeImmBT4BlT1BlxT2(), encodeImmBT4BlT1BlxT2_J1J2(), encodeImmMovtT1MovwT3(), G, llvm::jitlink::Symbol::getAddress(), llvm::orc::ExecutorAddr::getValue(), hasTargetFlags(), llvm::jitlink::aarch32::ArmConfig::J1J2BranchEncoding, LLVM_LIKELY, llvm::jitlink::makeTargetOutOfRangeError(), makeUnexpectedOpcodeError(), llvm::Error::success(), Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, Thumb_MovwAbsNC, and ThumbSymbol.

Referenced by applyFixup().

◆ checkOpcode() [1/2]

template<EdgeKind_aarch32 Kind>

bool llvm::jitlink::aarch32::checkOpcode ( const ArmRelocation & R )

Definition at line 257 of file aarch32.cpp.

◆ checkOpcode() [2/2]

template<EdgeKind_aarch32 Kind>

bool llvm::jitlink::aarch32::checkOpcode ( const ThumbRelocation & R )

Definition at line 251 of file aarch32.cpp.

References llvm::Hi, and llvm::Lo.

◆ checkRegister() [1/2]

template<EdgeKind_aarch32 Kind>

bool llvm::jitlink::aarch32::checkRegister	(	const ArmRelocation &	R,
		uint32_t	Reg
	)

Definition at line 270 of file aarch32.cpp.

References Reg.

◆ checkRegister() [2/2]

template<EdgeKind_aarch32 Kind>

bool llvm::jitlink::aarch32::checkRegister	(	const ThumbRelocation &	R,
		HalfWords	Reg
	)

Definition at line 263 of file aarch32.cpp.

References llvm::Hi, llvm::Lo, and Reg.

◆ decodeImmBA1BlA1BlxA2()

int64_t llvm::jitlink::aarch32::decodeImmBA1BlA1BlxA2 ( int64_t Value )

Decode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).

00000000:Imm24 -> Imm24:00

Definition at line 100 of file aarch32.cpp.

Referenced by readAddendArm().

◆ decodeImmBT4BlT1BlxT2()

int64_t llvm::jitlink::aarch32::decodeImmBT4BlT1BlxT2	(	uint32_t	Hi,
		uint32_t	Lo
	)

Decode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

[ 00000:Imm11H, 00000:Imm11L ] -> 00000:Imm11H:Imm11L:0 J1^ ^J2 will always be 1

Definition at line 52 of file aarch32.cpp.

References llvm::Hi, and llvm::Lo.

Referenced by readAddendThumb().

◆ decodeImmBT4BlT1BlxT2_J1J2()

int64_t llvm::jitlink::aarch32::decodeImmBT4BlT1BlxT2_J1J2	(	uint32_t	Hi,
		uint32_t	Lo
	)

Decode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).

[ 00000:S:Imm10, 00:J1:0:J2:Imm11] -> S:I1:I2:Imm10:Imm11:0

Definition at line 77 of file aarch32.cpp.

References llvm::Hi, and llvm::Lo.

Referenced by readAddendThumb().

◆ decodeImmMovtA1MovwA2()

uint16_t llvm::jitlink::aarch32::decodeImmMovtA1MovwA2 ( uint64_t Value )

Decode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

000000000000:Imm4:0000:Imm12 -> Imm4:Imm12

Definition at line 166 of file aarch32.cpp.

Referenced by readAddendArm().

◆ decodeImmMovtT1MovwT3()

uint16_t llvm::jitlink::aarch32::decodeImmMovtT1MovwT3	(	uint32_t	Hi,
		uint32_t	Lo
	)

Decode 16-bit immediate value from move instruction formats MOVT T1 and MOVW T3.

[ 00000:i:000000:Imm4, 0:Imm3:0000:Imm8 ] -> Imm4:Imm1:Imm3:Imm8

Definition at line 122 of file aarch32.cpp.

References assert(), llvm::Hi, and llvm::Lo.

Referenced by readAddendThumb().

◆ decodeRegMovtA1MovwA2()

int64_t llvm::jitlink::aarch32::decodeRegMovtA1MovwA2 ( uint64_t Value )

Decode register ID for instruction formats MOVT A1 and MOVW A2.

0000000000000000:Rd4:000000000000 -> Rd4

Definition at line 187 of file aarch32.cpp.

◆ decodeRegMovtT1MovwT3()

int64_t llvm::jitlink::aarch32::decodeRegMovtT1MovwT3	(	uint32_t	Hi,
		uint32_t	Lo
	)

Decode register ID from instruction formats MOVT T1 and MOVW T3.

[0000000000000000, 0000:Rd4:00000000] -> Rd4

Definition at line 145 of file aarch32.cpp.

References llvm::Lo.

◆ encodeImmBA1BlA1BlxA2()

uint32_t llvm::jitlink::aarch32::encodeImmBA1BlA1BlxA2 ( int64_t Value )

Encode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2).

Imm24:00 -> 00000000:Imm24

Definition at line 91 of file aarch32.cpp.

Referenced by applyFixupArm().

◆ encodeImmBT4BlT1BlxT2()

HalfWords llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2 ( int64_t Value )

Encode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2).

00000:Imm11H:Imm11L:0 -> [ 00000:Imm11H, 00000:Imm11L ] J1^ ^J2 will always be 1

Definition at line 39 of file aarch32.cpp.

Referenced by applyFixupThumb().

◆ encodeImmBT4BlT1BlxT2_J1J2()

HalfWords llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2_J1J2 ( int64_t Value )

Encode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2).

S:I1:I2:Imm10:Imm11:0 -> [ 00000:S:Imm10, 00:J1:0:J2:Imm11 ]

Definition at line 63 of file aarch32.cpp.

Referenced by applyFixupThumb().

◆ encodeImmMovtA1MovwA2()

uint32_t llvm::jitlink::aarch32::encodeImmMovtA1MovwA2 ( uint16_t Value )

Encode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2.

Imm4:Imm12 -> 000000000000:Imm4:0000:Imm12

Definition at line 155 of file aarch32.cpp.

Referenced by applyFixupArm().

◆ encodeImmMovtT1MovwT3()

HalfWords llvm::jitlink::aarch32::encodeImmMovtT1MovwT3 ( uint16_t Value )

Encode 16-bit immediate value for move instruction formats MOVT T1 and MOVW T3.

Imm4:Imm1:Imm3:Imm8 -> [ 00000:i:000000:Imm4, 0:Imm3:0000:Imm8 ]

Definition at line 109 of file aarch32.cpp.

Referenced by applyFixupThumb().

◆ encodeRegMovtA1MovwA2()

uint32_t llvm::jitlink::aarch32::encodeRegMovtA1MovwA2 ( int64_t Value )

Encode register ID for instruction formats MOVT A1 and MOVW A2.

Rd4 -> 0000000000000000:Rd4:000000000000

Definition at line 177 of file aarch32.cpp.

◆ encodeRegMovtT1MovwT3()

HalfWords llvm::jitlink::aarch32::encodeRegMovtT1MovwT3 ( int64_t Value )

Encode register ID for instruction formats MOVT T1 and MOVW T3.

Rd4 -> [0000000000000000, 0000:Rd4:00000000]

Definition at line 136 of file aarch32.cpp.

Referenced by llvm::jitlink::aarch32::StubsManager< Flavor >::createEntry().

◆ getArmConfigForCPUArch()

ArmConfig llvm::jitlink::aarch32::getArmConfigForCPUArch ( ARMBuildAttrs::CPUArch CPUArch )

inline

Obtain the sub-arch configuration for a given Arm CPU model.

Definition at line 129 of file aarch32.h.

References llvm::dbgs(), DEBUG_WITH_TYPE, getCPUArchName(), llvm::jitlink::aarch32::ArmConfig::J1J2BranchEncoding, llvm::jitlink::aarch32::ArmConfig::Stubs, Thumbv7, llvm::ARMBuildAttrs::v7, and llvm::ARMBuildAttrs::v8_A.

Referenced by llvm::jitlink::createLinkGraphFromELFObject_aarch32().

◆ getCPUArchName()

const char * llvm::jitlink::aarch32::getCPUArchName ( ARMBuildAttrs::CPUArch K )

Human-readable name for a given CPU architecture kind.

Definition at line 670 of file aarch32.cpp.

References CPUARCH_NAME_CASE, and llvm_unreachable.

Referenced by llvm::jitlink::createLinkGraphFromELFObject_aarch32(), and getArmConfigForCPUArch().

◆ getEdgeKindName()

const char * llvm::jitlink::aarch32::getEdgeKindName ( Edge::Kind K )

Get a human-readable name for the given AArch32 edge kind.

Definition at line 648 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, Data_Delta32, Data_Pointer32, llvm::jitlink::getGenericEdgeKindName(), KIND_NAME_CASE, Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, and Thumb_MovwAbsNC.

Referenced by llvm::jitlink::getELFAArch32EdgeKindName().

◆ hasTargetFlags()

bool llvm::jitlink::aarch32::hasTargetFlags	(	Symbol &	Sym,
		TargetFlagsType	Flags
	)

Check whether the given target flags are set for this Symbol.

Definition at line 29 of file aarch32.cpp.

References Sym.

Referenced by applyFixupArm(), and applyFixupThumb().

◆ makeUnexpectedOpcodeError() [1/2]

Error llvm::jitlink::aarch32::makeUnexpectedOpcodeError	(	const LinkGraph &	G,
		const ArmRelocation &	R,
		Edge::Kind	Kind
	)

Definition at line 244 of file aarch32.cpp.

References llvm::formatv(), and G.

◆ makeUnexpectedOpcodeError() [2/2]

Error llvm::jitlink::aarch32::makeUnexpectedOpcodeError	(	const LinkGraph &	G,
		const ThumbRelocation &	R,
		Edge::Kind	Kind
	)

Definition at line 236 of file aarch32.cpp.

References llvm::formatv(), and G.

Referenced by applyFixupArm(), applyFixupThumb(), readAddendArm(), and readAddendThumb().

◆ readAddend()

Expected< int64_t > llvm::jitlink::aarch32::readAddend	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E,
		const ArmConfig &	ArmCfg
	)

inline

Read the initial addend for a REL-type relocation.

It's the value encoded in the immediate field of the fixup location by the compiler.

Definition at line 232 of file aarch32.h.

References B, E, G, LastArmRelocation, LastDataRelocation, LastThumbRelocation, llvm_unreachable, readAddendArm(), readAddendData(), and readAddendThumb().

◆ readAddendArm()

Expected< int64_t > llvm::jitlink::aarch32::readAddendArm	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E
	)

Helper function to read the initial addend for Arm-class relocations.

Definition at line 327 of file aarch32.cpp.

References Arm_Call, Arm_Jump24, Arm_MovtAbs, Arm_MovwAbsNC, B, decodeImmBA1BlA1BlxA2(), decodeImmMovtA1MovwA2(), E, G, and makeUnexpectedOpcodeError().

Referenced by readAddend().

◆ readAddendData()

Expected< int64_t > llvm::jitlink::aarch32::readAddendData	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E
	)

Helper function to read the initial addend for Data-class relocations.

Definition at line 307 of file aarch32.cpp.

References assert(), B, Data_Delta32, Data_Pointer32, E, Endian, G, llvm::support::native, and llvm::support::endian::read32().

Referenced by readAddend().

◆ readAddendThumb()

Expected< int64_t > llvm::jitlink::aarch32::readAddendThumb	(	LinkGraph &	G,
		Block &	B,
		const Edge &	E,
		const ArmConfig &	ArmCfg
	)

Helper function to read the initial addend for Thumb-class relocations.

Definition at line 360 of file aarch32.cpp.

References B, decodeImmBT4BlT1BlxT2(), decodeImmBT4BlT1BlxT2_J1J2(), decodeImmMovtT1MovwT3(), E, G, llvm::jitlink::aarch32::ArmConfig::J1J2BranchEncoding, LLVM_LIKELY, makeUnexpectedOpcodeError(), Thumb_Call, Thumb_Jump24, Thumb_MovtAbs, and Thumb_MovwAbsNC.

Referenced by readAddend().

◆ writeImmediate() [1/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeImmediate	(	WritableArmRelocation &	R,
		uint32_t	Imm
	)

Definition at line 301 of file aarch32.cpp.

References assert().

◆ writeImmediate() [2/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeImmediate	(	WritableThumbRelocation &	R,
		HalfWords	Imm
	)

Definition at line 292 of file aarch32.cpp.

References assert().

◆ writeRegister() [1/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeRegister	(	WritableArmRelocation &	R,
		uint32_t	Reg
	)

Definition at line 285 of file aarch32.cpp.

References assert(), and Reg.

◆ writeRegister() [2/2]

template<EdgeKind_aarch32 Kind>

void llvm::jitlink::aarch32::writeRegister	(	WritableThumbRelocation &	R,
		HalfWords	Reg
	)

Definition at line 276 of file aarch32.cpp.

References assert(), and Reg.

Variable Documentation

◆ Thumbv7ABS

const uint8_t llvm::jitlink::aarch32::Thumbv7ABS[]

Initial value:

= {
    0x40, 0xf2, 0x00, 0x0c, 
    0xc0, 0xf2, 0x00, 0x0c, 
    0x60, 0x47              
}

Definition at line 624 of file aarch32.cpp.

Referenced by llvm::jitlink::aarch32::StubsManager< Flavor >::createEntry().

Classes

Enumerations

Functions

Variables

Enumeration Type Documentation

◆ EdgeKind_aarch32

◆ StubsFlavor

◆ TargetFlags_aarch32

Function Documentation

◆ applyFixup()

◆ applyFixupArm()

◆ applyFixupData()

◆ applyFixupThumb()

◆ checkOpcode() [1/2]

◆ checkOpcode() [2/2]

◆ checkRegister() [1/2]

◆ checkRegister() [2/2]

◆ decodeImmBA1BlA1BlxA2()

◆ decodeImmBT4BlT1BlxT2()

◆ decodeImmBT4BlT1BlxT2_J1J2()

◆ decodeImmMovtA1MovwA2()

◆ decodeImmMovtT1MovwT3()

◆ decodeRegMovtA1MovwA2()

◆ decodeRegMovtT1MovwT3()

◆ encodeImmBA1BlA1BlxA2()

◆ encodeImmBT4BlT1BlxT2()

◆ encodeImmBT4BlT1BlxT2_J1J2()

◆ encodeImmMovtA1MovwA2()

◆ encodeImmMovtT1MovwT3()

◆ encodeRegMovtA1MovwA2()

◆ encodeRegMovtT1MovwT3()

◆ getArmConfigForCPUArch()

◆ getCPUArchName()

◆ getEdgeKindName()

◆ hasTargetFlags()

◆ makeUnexpectedOpcodeError() [1/2]

◆ makeUnexpectedOpcodeError() [2/2]

◆ readAddend()

◆ readAddendArm()

◆ readAddendData()

◆ readAddendThumb()

◆ writeImmediate() [1/2]

◆ writeImmediate() [2/2]

◆ writeRegister() [1/2]

◆ writeRegister() [2/2]

Variable Documentation

◆ Thumbv7ABS