LLVM API Documentation

CalcSpillWeights.cpp
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00001 //===------------------------ CalcSpillWeights.cpp ------------------------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 
00010 #define DEBUG_TYPE "calcspillweights"
00011 
00012 #include "llvm/ADT/SmallSet.h"
00013 #include "llvm/CodeGen/CalcSpillWeights.h"
00014 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
00015 #include "llvm/CodeGen/MachineFunction.h"
00016 #include "llvm/CodeGen/MachineLoopInfo.h"
00017 #include "llvm/CodeGen/MachineRegisterInfo.h"
00018 #include "llvm/CodeGen/SlotIndexes.h"
00019 #include "llvm/Support/Debug.h"
00020 #include "llvm/Support/raw_ostream.h"
00021 #include "llvm/Target/TargetInstrInfo.h"
00022 #include "llvm/Target/TargetMachine.h"
00023 #include "llvm/Target/TargetRegisterInfo.h"
00024 using namespace llvm;
00025 
00026 char CalculateSpillWeights::ID = 0;
00027 INITIALIZE_PASS_BEGIN(CalculateSpillWeights, "calcspillweights",
00028                 "Calculate spill weights", false, false)
00029 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
00030 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
00031 INITIALIZE_PASS_END(CalculateSpillWeights, "calcspillweights",
00032                 "Calculate spill weights", false, false)
00033 
00034 void CalculateSpillWeights::getAnalysisUsage(AnalysisUsage &au) const {
00035   au.addRequired<LiveIntervals>();
00036   au.addRequired<MachineLoopInfo>();
00037   au.setPreservesAll();
00038   MachineFunctionPass::getAnalysisUsage(au);
00039 }
00040 
00041 bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &MF) {
00042 
00043   DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
00044                << "********** Function: " << MF.getName() << '\n');
00045 
00046   LiveIntervals &LIS = getAnalysis<LiveIntervals>();
00047   MachineRegisterInfo &MRI = MF.getRegInfo();
00048   VirtRegAuxInfo VRAI(MF, LIS, getAnalysis<MachineLoopInfo>());
00049   for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
00050     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
00051     if (MRI.reg_nodbg_empty(Reg))
00052       continue;
00053     VRAI.CalculateWeightAndHint(LIS.getInterval(Reg));
00054   }
00055   return false;
00056 }
00057 
00058 // Return the preferred allocation register for reg, given a COPY instruction.
00059 static unsigned copyHint(const MachineInstr *mi, unsigned reg,
00060                          const TargetRegisterInfo &tri,
00061                          const MachineRegisterInfo &mri) {
00062   unsigned sub, hreg, hsub;
00063   if (mi->getOperand(0).getReg() == reg) {
00064     sub = mi->getOperand(0).getSubReg();
00065     hreg = mi->getOperand(1).getReg();
00066     hsub = mi->getOperand(1).getSubReg();
00067   } else {
00068     sub = mi->getOperand(1).getSubReg();
00069     hreg = mi->getOperand(0).getReg();
00070     hsub = mi->getOperand(0).getSubReg();
00071   }
00072 
00073   if (!hreg)
00074     return 0;
00075 
00076   if (TargetRegisterInfo::isVirtualRegister(hreg))
00077     return sub == hsub ? hreg : 0;
00078 
00079   const TargetRegisterClass *rc = mri.getRegClass(reg);
00080 
00081   // Only allow physreg hints in rc.
00082   if (sub == 0)
00083     return rc->contains(hreg) ? hreg : 0;
00084 
00085   // reg:sub should match the physreg hreg.
00086   return tri.getMatchingSuperReg(hreg, sub, rc);
00087 }
00088 
00089 // Check if all values in LI are rematerializable
00090 static bool isRematerializable(const LiveInterval &LI,
00091                                const LiveIntervals &LIS,
00092                                const TargetInstrInfo &TII) {
00093   for (LiveInterval::const_vni_iterator I = LI.vni_begin(), E = LI.vni_end();
00094        I != E; ++I) {
00095     const VNInfo *VNI = *I;
00096     if (VNI->isUnused())
00097       continue;
00098     if (VNI->isPHIDef())
00099       return false;
00100 
00101     MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
00102     assert(MI && "Dead valno in interval");
00103 
00104     if (!TII.isTriviallyReMaterializable(MI, LIS.getAliasAnalysis()))
00105       return false;
00106   }
00107   return true;
00108 }
00109 
00110 void VirtRegAuxInfo::CalculateWeightAndHint(LiveInterval &li) {
00111   MachineRegisterInfo &mri = MF.getRegInfo();
00112   const TargetRegisterInfo &tri = *MF.getTarget().getRegisterInfo();
00113   MachineBasicBlock *mbb = 0;
00114   MachineLoop *loop = 0;
00115   unsigned loopDepth = 0;
00116   bool isExiting = false;
00117   float totalWeight = 0;
00118   SmallPtrSet<MachineInstr*, 8> visited;
00119 
00120   // Find the best physreg hint and the best virtreg hint.
00121   float bestPhys = 0, bestVirt = 0;
00122   unsigned hintPhys = 0, hintVirt = 0;
00123 
00124   // Don't recompute a target specific hint.
00125   bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
00126 
00127   // Don't recompute spill weight for an unspillable register.
00128   bool Spillable = li.isSpillable();
00129 
00130   for (MachineRegisterInfo::reg_iterator I = mri.reg_begin(li.reg);
00131        MachineInstr *mi = I.skipInstruction();) {
00132     if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugValue())
00133       continue;
00134     if (!visited.insert(mi))
00135       continue;
00136 
00137     float weight = 1.0f;
00138     if (Spillable) {
00139       // Get loop info for mi.
00140       if (mi->getParent() != mbb) {
00141         mbb = mi->getParent();
00142         loop = Loops.getLoopFor(mbb);
00143         loopDepth = loop ? loop->getLoopDepth() : 0;
00144         isExiting = loop ? loop->isLoopExiting(mbb) : false;
00145       }
00146 
00147       // Calculate instr weight.
00148       bool reads, writes;
00149       tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg);
00150       weight = LiveIntervals::getSpillWeight(writes, reads, loopDepth);
00151 
00152       // Give extra weight to what looks like a loop induction variable update.
00153       if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
00154         weight *= 3;
00155 
00156       totalWeight += weight;
00157     }
00158 
00159     // Get allocation hints from copies.
00160     if (noHint || !mi->isCopy())
00161       continue;
00162     unsigned hint = copyHint(mi, li.reg, tri, mri);
00163     if (!hint)
00164       continue;
00165     float hweight = Hint[hint] += weight;
00166     if (TargetRegisterInfo::isPhysicalRegister(hint)) {
00167       if (hweight > bestPhys && mri.isAllocatable(hint))
00168         bestPhys = hweight, hintPhys = hint;
00169     } else {
00170       if (hweight > bestVirt)
00171         bestVirt = hweight, hintVirt = hint;
00172     }
00173   }
00174 
00175   Hint.clear();
00176 
00177   // Always prefer the physreg hint.
00178   if (unsigned hint = hintPhys ? hintPhys : hintVirt) {
00179     mri.setRegAllocationHint(li.reg, 0, hint);
00180     // Weakly boost the spill weight of hinted registers.
00181     totalWeight *= 1.01F;
00182   }
00183 
00184   // If the live interval was already unspillable, leave it that way.
00185   if (!Spillable)
00186     return;
00187 
00188   // Mark li as unspillable if all live ranges are tiny.
00189   if (li.isZeroLength(LIS.getSlotIndexes())) {
00190     li.markNotSpillable();
00191     return;
00192   }
00193 
00194   // If all of the definitions of the interval are re-materializable,
00195   // it is a preferred candidate for spilling.
00196   // FIXME: this gets much more complicated once we support non-trivial
00197   // re-materialization.
00198   if (isRematerializable(li, LIS, *MF.getTarget().getInstrInfo()))
00199     totalWeight *= 0.5F;
00200 
00201   li.weight = normalizeSpillWeight(totalWeight, li.getSize());
00202 }