LLVM  8.0.0svn
DwarfExpression.h
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1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains support for writing dwarf compile unit.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/None.h"
19 #include "llvm/ADT/Optional.h"
20 #include "llvm/ADT/SmallVector.h"
22 #include <cassert>
23 #include <cstdint>
24 #include <iterator>
25 
26 namespace llvm {
27 
28 class AsmPrinter;
29 class APInt;
30 class ByteStreamer;
31 class DwarfUnit;
32 class DIELoc;
33 class TargetRegisterInfo;
34 
35 /// Holds a DIExpression and keeps track of how many operands have been consumed
36 /// so far.
39 
40 public:
42  if (!Expr) {
43  assert(Start == End);
44  return;
45  }
46  Start = Expr->expr_op_begin();
47  End = Expr->expr_op_end();
48  }
49 
51  : Start(Expr.begin()), End(Expr.end()) {}
52 
53  DIExpressionCursor(const DIExpressionCursor &) = default;
54 
55  /// Consume one operation.
57  if (Start == End)
58  return None;
59  return *(Start++);
60  }
61 
62  /// Consume N operations.
63  void consume(unsigned N) { std::advance(Start, N); }
64 
65  /// Return the current operation.
67  if (Start == End)
68  return None;
69  return *(Start);
70  }
71 
72  /// Return the next operation.
74  if (Start == End)
75  return None;
76 
77  auto Next = Start.getNext();
78  if (Next == End)
79  return None;
80 
81  return *Next;
82  }
83 
84  /// Determine whether there are any operations left in this expression.
85  operator bool() const { return Start != End; }
86 
87  DIExpression::expr_op_iterator begin() const { return Start; }
88  DIExpression::expr_op_iterator end() const { return End; }
89 
90  /// Retrieve the fragment information, if any.
92  return DIExpression::getFragmentInfo(Start, End);
93  }
94 };
95 
96 /// Base class containing the logic for constructing DWARF expressions
97 /// independently of whether they are emitted into a DIE or into a .debug_loc
98 /// entry.
100 protected:
101  /// Holds information about all subregisters comprising a register location.
102  struct Register {
104  unsigned Size;
105  const char *Comment;
106  };
107 
108  /// The register location, if any.
110 
111  /// Current Fragment Offset in Bits.
112  uint64_t OffsetInBits = 0;
113  unsigned DwarfVersion;
114 
115  /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
116  unsigned SubRegisterSizeInBits = 0;
117  unsigned SubRegisterOffsetInBits = 0;
118 
119  /// The kind of location description being produced.
120  enum { Unknown = 0, Register, Memory, Implicit } LocationKind = Unknown;
121 
122  /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
123  /// to represent a subregister.
124  void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
125  SubRegisterSizeInBits = SizeInBits;
126  SubRegisterOffsetInBits = OffsetInBits;
127  }
128 
129  /// Add masking operations to stencil out a subregister.
130  void maskSubRegister();
131 
132  /// Output a dwarf operand and an optional assembler comment.
133  virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
134 
135  /// Emit a raw signed value.
136  virtual void emitSigned(int64_t Value) = 0;
137 
138  /// Emit a raw unsigned value.
139  virtual void emitUnsigned(uint64_t Value) = 0;
140 
141  /// Emit a normalized unsigned constant.
142  void emitConstu(uint64_t Value);
143 
144  /// Return whether the given machine register is the frame register in the
145  /// current function.
146  virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
147 
148  /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
149  /// register location description.
150  void addReg(int DwarfReg, const char *Comment = nullptr);
151 
152  /// Emit a DW_OP_breg operation.
153  void addBReg(int DwarfReg, int Offset);
154 
155  /// Emit DW_OP_fbreg <Offset>.
156  void addFBReg(int Offset);
157 
158  /// Emit a partial DWARF register operation.
159  ///
160  /// \param MachineReg The register number.
161  /// \param MaxSize If the register must be composed from
162  /// sub-registers this is an upper bound
163  /// for how many bits the emitted DW_OP_piece
164  /// may cover.
165  ///
166  /// If size and offset is zero an operation for the entire register is
167  /// emitted: Some targets do not provide a DWARF register number for every
168  /// register. If this is the case, this function will attempt to emit a DWARF
169  /// register by emitting a fragment of a super-register or by piecing together
170  /// multiple subregisters that alias the register.
171  ///
172  /// \return false if no DWARF register exists for MachineReg.
173  bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
174  unsigned MaxSize = ~1U);
175 
176  /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
177  /// \param OffsetInBits This is an optional offset into the location that
178  /// is at the top of the DWARF stack.
179  void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
180 
181  /// Emit a shift-right dwarf operation.
182  void addShr(unsigned ShiftBy);
183 
184  /// Emit a bitwise and dwarf operation.
185  void addAnd(unsigned Mask);
186 
187  /// Emit a DW_OP_stack_value, if supported.
188  ///
189  /// The proper way to describe a constant value is DW_OP_constu <const>,
190  /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
191  /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
192  /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
193  /// <const> actually describes a value at a constant addess, not a constant
194  /// value. However, in the past there was no better way to describe a
195  /// constant value, so the producers and consumers started to rely on
196  /// heuristics to disambiguate the value vs. location status of the
197  /// expression. See PR21176 for more details.
198  void addStackValue();
199 
200  ~DwarfExpression() = default;
201 
202 public:
203  DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
204 
205  /// This needs to be called last to commit any pending changes.
206  void finalize();
207 
208  /// Emit a signed constant.
209  void addSignedConstant(int64_t Value);
210 
211  /// Emit an unsigned constant.
212  void addUnsignedConstant(uint64_t Value);
213 
214  /// Emit an unsigned constant.
215  void addUnsignedConstant(const APInt &Value);
216 
217  bool isMemoryLocation() const { return LocationKind == Memory; }
218  bool isUnknownLocation() const { return LocationKind == Unknown; }
219 
220  /// Lock this down to become a memory location description.
222  assert(LocationKind == Unknown);
223  LocationKind = Memory;
224  }
225 
226  /// Emit a machine register location. As an optimization this may also consume
227  /// the prefix of a DwarfExpression if a more efficient representation for
228  /// combining the register location and the first operation exists.
229  ///
230  /// \param FragmentOffsetInBits If this is one fragment out of a
231  /// fragmented
232  /// location, this is the offset of the
233  /// fragment inside the entire variable.
234  /// \return false if no DWARF register exists
235  /// for MachineReg.
236  bool addMachineRegExpression(const TargetRegisterInfo &TRI,
237  DIExpressionCursor &Expr, unsigned MachineReg,
238  unsigned FragmentOffsetInBits = 0);
239 
240  /// Emit all remaining operations in the DIExpressionCursor.
241  ///
242  /// \param FragmentOffsetInBits If this is one fragment out of multiple
243  /// locations, this is the offset of the
244  /// fragment inside the entire variable.
245  void addExpression(DIExpressionCursor &&Expr,
246  unsigned FragmentOffsetInBits = 0);
247 
248  /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
249  /// the fragment described by \c Expr.
250  void addFragmentOffset(const DIExpression *Expr);
251 };
252 
253 /// DwarfExpression implementation for .debug_loc entries.
255  ByteStreamer &BS;
256 
257  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
258  void emitSigned(int64_t Value) override;
259  void emitUnsigned(uint64_t Value) override;
260  bool isFrameRegister(const TargetRegisterInfo &TRI,
261  unsigned MachineReg) override;
262 
263 public:
264  DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
265  : DwarfExpression(DwarfVersion), BS(BS) {}
266 };
267 
268 /// DwarfExpression implementation for singular DW_AT_location.
269 class DIEDwarfExpression final : public DwarfExpression {
270 const AsmPrinter &AP;
271  DwarfUnit &DU;
272  DIELoc &DIE;
273 
274  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
275  void emitSigned(int64_t Value) override;
276  void emitUnsigned(uint64_t Value) override;
277  bool isFrameRegister(const TargetRegisterInfo &TRI,
278  unsigned MachineReg) override;
279 public:
280  DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
281 
284  return &DIE;
285  }
286 };
287 
288 } // end namespace llvm
289 
290 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
DIELoc - Represents an expression location.
Definition: DIE.h:846
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
arc branch finalize
void setMemoryLocationKind()
Lock this down to become a memory location description.
This class provides various memory handling functions that manipulate MemoryBlock instances...
Definition: Memory.h:46
Base class containing the logic for constructing DWARF expressions independently of whether they are ...
unsigned const TargetRegisterInfo * TRI
DwarfExpression(unsigned DwarfVersion)
expr_op_iterator expr_op_begin() const
Visit the elements via ExprOperand wrappers.
Holds a DIExpression and keeps track of how many operands have been consumed so far.
DwarfExpression implementation for .debug_loc entries.
void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits)
Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed to represent a subregister...
expr_op_iterator expr_op_end() const
Optional< DIExpression::ExprOperand > peek() const
Return the current operation.
Optional< DIExpression::ExprOperand > peekNext() const
Return the next operation.
Optional< DIExpression::ExprOperand > take()
Consume one operation.
This dwarf writer support class manages information associated with a source file.
Definition: DwarfUnit.h:68
DIExpressionCursor(const DIExpression *Expr)
A structured debug information entry.
Definition: DIE.h:662
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
Optional< FragmentInfo > getFragmentInfo() const
Retrieve the details of this fragment expression.
bool isMemoryLocation() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
bool isUnknownLocation() const
Promote Memory to Register
Definition: Mem2Reg.cpp:110
DWARF expression.
Class for arbitrary precision integers.
Definition: APInt.h:70
Optional< DIExpression::FragmentInfo > getFragmentInfo() const
Retrieve the fragment information, if any.
void consume(unsigned N)
Consume N operations.
DIExpression::expr_op_iterator begin() const
void finalize()
This needs to be called last to commit any pending changes.
#define N
DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
DIExpressionCursor(ArrayRef< uint64_t > Expr)
DwarfExpression implementation for singular DW_AT_location.
Holds information about all subregisters comprising a register location.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:73
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
expr_op_iterator getNext() const
Get the next iterator.
An iterator for expression operands.
SmallVector< Register, 2 > DwarfRegs
The register location, if any.
DIExpression::expr_op_iterator end() const