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DwarfExpression.h
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1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains support for writing dwarf compile unit.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
14 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 
16 #include "llvm/ADT/ArrayRef.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/SmallVector.h"
21 #include <cassert>
22 #include <cstdint>
23 #include <iterator>
24 
25 namespace llvm {
26 
27 class AsmPrinter;
28 class APInt;
29 class ByteStreamer;
30 class DwarfCompileUnit;
31 class DIELoc;
32 class TargetRegisterInfo;
33 
34 /// Holds a DIExpression and keeps track of how many operands have been consumed
35 /// so far.
38 
39 public:
41  if (!Expr) {
42  assert(Start == End);
43  return;
44  }
45  Start = Expr->expr_op_begin();
46  End = Expr->expr_op_end();
47  }
48 
50  : Start(Expr.begin()), End(Expr.end()) {}
51 
52  DIExpressionCursor(const DIExpressionCursor &) = default;
53 
54  /// Consume one operation.
56  if (Start == End)
57  return None;
58  return *(Start++);
59  }
60 
61  /// Consume N operations.
62  void consume(unsigned N) { std::advance(Start, N); }
63 
64  /// Return the current operation.
66  if (Start == End)
67  return None;
68  return *(Start);
69  }
70 
71  /// Return the next operation.
73  if (Start == End)
74  return None;
75 
76  auto Next = Start.getNext();
77  if (Next == End)
78  return None;
79 
80  return *Next;
81  }
82 
83  /// Determine whether there are any operations left in this expression.
84  operator bool() const { return Start != End; }
85 
86  DIExpression::expr_op_iterator begin() const { return Start; }
87  DIExpression::expr_op_iterator end() const { return End; }
88 
89  /// Retrieve the fragment information, if any.
91  return DIExpression::getFragmentInfo(Start, End);
92  }
93 };
94 
95 /// Base class containing the logic for constructing DWARF expressions
96 /// independently of whether they are emitted into a DIE or into a .debug_loc
97 /// entry.
99 protected:
100  /// Holds information about all subregisters comprising a register location.
101  struct Register {
103  unsigned Size;
104  const char *Comment;
105  };
106 
108 
109  /// The register location, if any.
111 
112  /// Current Fragment Offset in Bits.
113  uint64_t OffsetInBits = 0;
114 
115  /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
116  unsigned SubRegisterSizeInBits : 16;
117  unsigned SubRegisterOffsetInBits : 16;
118 
119  /// The kind of location description being produced.
120  enum { Unknown = 0, Register, Memory, Implicit };
121 
122  unsigned LocationKind : 3;
123  unsigned LocationFlags : 2;
124  unsigned DwarfVersion : 4;
125 
126 public:
127  bool isUnknownLocation() const {
128  return LocationKind == Unknown;
129  }
130 
131  bool isMemoryLocation() const {
132  return LocationKind == Memory;
133  }
134 
135  bool isRegisterLocation() const {
136  return LocationKind == Register;
137  }
138 
139  bool isImplicitLocation() const {
140  return LocationKind == Implicit;
141  }
142 
143 protected:
144  /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
145  /// to represent a subregister.
146  void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
147  assert(SizeInBits < 65536 && OffsetInBits < 65536);
148  SubRegisterSizeInBits = SizeInBits;
149  SubRegisterOffsetInBits = OffsetInBits;
150  }
151 
152  /// Add masking operations to stencil out a subregister.
153  void maskSubRegister();
154 
155  /// Output a dwarf operand and an optional assembler comment.
156  virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
157 
158  /// Emit a raw signed value.
159  virtual void emitSigned(int64_t Value) = 0;
160 
161  /// Emit a raw unsigned value.
162  virtual void emitUnsigned(uint64_t Value) = 0;
163 
164  virtual void emitData1(uint8_t Value) = 0;
165 
166  virtual void emitBaseTypeRef(uint64_t Idx) = 0;
167 
168  /// Emit a normalized unsigned constant.
169  void emitConstu(uint64_t Value);
170 
171  /// Return whether the given machine register is the frame register in the
172  /// current function.
173  virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
174 
175  /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
176  /// register location description.
177  void addReg(int DwarfReg, const char *Comment = nullptr);
178 
179  /// Emit a DW_OP_breg operation.
180  void addBReg(int DwarfReg, int Offset);
181 
182  /// Emit DW_OP_fbreg <Offset>.
183  void addFBReg(int Offset);
184 
185  /// Emit a partial DWARF register operation.
186  ///
187  /// \param MachineReg The register number.
188  /// \param MaxSize If the register must be composed from
189  /// sub-registers this is an upper bound
190  /// for how many bits the emitted DW_OP_piece
191  /// may cover.
192  ///
193  /// If size and offset is zero an operation for the entire register is
194  /// emitted: Some targets do not provide a DWARF register number for every
195  /// register. If this is the case, this function will attempt to emit a DWARF
196  /// register by emitting a fragment of a super-register or by piecing together
197  /// multiple subregisters that alias the register.
198  ///
199  /// \return false if no DWARF register exists for MachineReg.
200  bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
201  unsigned MaxSize = ~1U);
202 
203  /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
204  /// \param OffsetInBits This is an optional offset into the location that
205  /// is at the top of the DWARF stack.
206  void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
207 
208  /// Emit a shift-right dwarf operation.
209  void addShr(unsigned ShiftBy);
210 
211  /// Emit a bitwise and dwarf operation.
212  void addAnd(unsigned Mask);
213 
214  /// Emit a DW_OP_stack_value, if supported.
215  ///
216  /// The proper way to describe a constant value is DW_OP_constu <const>,
217  /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
218  /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
219  /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
220  /// <const> actually describes a value at a constant address, not a constant
221  /// value. However, in the past there was no better way to describe a
222  /// constant value, so the producers and consumers started to rely on
223  /// heuristics to disambiguate the value vs. location status of the
224  /// expression. See PR21176 for more details.
225  void addStackValue();
226 
227  ~DwarfExpression() = default;
228 
229 public:
230  DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU)
231  : CU(CU), SubRegisterSizeInBits(0), SubRegisterOffsetInBits(0),
232  LocationKind(Unknown), LocationFlags(Unknown),
233  DwarfVersion(DwarfVersion) {}
234 
235  /// This needs to be called last to commit any pending changes.
236  void finalize();
237 
238  /// Emit a signed constant.
239  void addSignedConstant(int64_t Value);
240 
241  /// Emit an unsigned constant.
242  void addUnsignedConstant(uint64_t Value);
243 
244  /// Emit an unsigned constant.
245  void addUnsignedConstant(const APInt &Value);
246 
247  /// Lock this down to become a memory location description.
249  assert(isUnknownLocation());
250  LocationKind = Memory;
251  }
252 
253  /// Emit a machine register location. As an optimization this may also consume
254  /// the prefix of a DwarfExpression if a more efficient representation for
255  /// combining the register location and the first operation exists.
256  ///
257  /// \param FragmentOffsetInBits If this is one fragment out of a
258  /// fragmented
259  /// location, this is the offset of the
260  /// fragment inside the entire variable.
261  /// \return false if no DWARF register exists
262  /// for MachineReg.
263  bool addMachineRegExpression(const TargetRegisterInfo &TRI,
264  DIExpressionCursor &Expr, unsigned MachineReg,
265  unsigned FragmentOffsetInBits = 0);
266 
267  /// Emit all remaining operations in the DIExpressionCursor.
268  ///
269  /// \param FragmentOffsetInBits If this is one fragment out of multiple
270  /// locations, this is the offset of the
271  /// fragment inside the entire variable.
272  void addExpression(DIExpressionCursor &&Expr,
273  unsigned FragmentOffsetInBits = 0);
274 
275  /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
276  /// the fragment described by \c Expr.
277  void addFragmentOffset(const DIExpression *Expr);
278 
279  void emitLegacySExt(unsigned FromBits);
280  void emitLegacyZExt(unsigned FromBits);
281 };
282 
283 /// DwarfExpression implementation for .debug_loc entries.
285  ByteStreamer &BS;
286 
287  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
288  void emitSigned(int64_t Value) override;
289  void emitUnsigned(uint64_t Value) override;
290  void emitData1(uint8_t Value) override;
291  void emitBaseTypeRef(uint64_t Idx) override;
292  bool isFrameRegister(const TargetRegisterInfo &TRI,
293  unsigned MachineReg) override;
294 
295 public:
297  : DwarfExpression(DwarfVersion, CU), BS(BS) {}
298 };
299 
300 /// DwarfExpression implementation for singular DW_AT_location.
301 class DIEDwarfExpression final : public DwarfExpression {
302 const AsmPrinter &AP;
303  DIELoc &DIE;
304 
305  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
306  void emitSigned(int64_t Value) override;
307  void emitUnsigned(uint64_t Value) override;
308  void emitData1(uint8_t Value) override;
309  void emitBaseTypeRef(uint64_t Idx) override;
310  bool isFrameRegister(const TargetRegisterInfo &TRI,
311  unsigned MachineReg) override;
312 public:
314 
317  return &DIE;
318  }
319 };
320 
321 } // end namespace llvm
322 
323 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
DIELoc - Represents an expression location.
Definition: DIE.h:891
This class represents lattice values for constants.
Definition: AllocatorList.h:23
arc branch finalize
void setMemoryLocationKind()
Lock this down to become a memory location description.
This class provides various memory handling functions that manipulate MemoryBlock instances...
Definition: Memory.h:53
Base class containing the logic for constructing DWARF expressions independently of whether they are ...
unsigned const TargetRegisterInfo * TRI
DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU)
expr_op_iterator expr_op_begin() const
Visit the elements via ExprOperand wrappers.
Holds a DIExpression and keeps track of how many operands have been consumed so far.
DwarfExpression implementation for .debug_loc entries.
void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits)
Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed to represent a subregister...
expr_op_iterator expr_op_end() const
Optional< DIExpression::ExprOperand > peek() const
Return the current operation.
bool isImplicitLocation() const
Optional< DIExpression::ExprOperand > peekNext() const
Return the next operation.
Optional< DIExpression::ExprOperand > take()
Consume one operation.
DIExpressionCursor(const DIExpression *Expr)
A structured debug information entry.
Definition: DIE.h:700
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
Optional< FragmentInfo > getFragmentInfo() const
Retrieve the details of this fragment expression.
bool isMemoryLocation() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:841
bool isUnknownLocation() const
Promote Memory to Register
Definition: Mem2Reg.cpp:109
DWARF expression.
Class for arbitrary precision integers.
Definition: APInt.h:69
Optional< DIExpression::FragmentInfo > getFragmentInfo() const
Retrieve the fragment information, if any.
unsigned SubRegisterSizeInBits
Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
void consume(unsigned N)
Consume N operations.
DIExpression::expr_op_iterator begin() const
void finalize()
This needs to be called last to commit any pending changes.
#define N
DIExpressionCursor(ArrayRef< uint64_t > Expr)
DwarfExpression implementation for singular DW_AT_location.
Holds information about all subregisters comprising a register location.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:72
DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS, DwarfCompileUnit &CU)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
expr_op_iterator getNext() const
Get the next iterator.
An iterator for expression operands.
DwarfCompileUnit & CU
SmallVector< Register, 2 > DwarfRegs
The register location, if any.
DIExpression::expr_op_iterator end() const
bool isRegisterLocation() const