LLVM  9.0.0svn
DwarfExpression.h
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1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains support for writing dwarf compile unit.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
14 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 
16 #include "llvm/ADT/ArrayRef.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/SmallVector.h"
21 #include <cassert>
22 #include <cstdint>
23 #include <iterator>
24 
25 namespace llvm {
26 
27 class AsmPrinter;
28 class APInt;
29 class ByteStreamer;
30 class DwarfCompileUnit;
31 class DIELoc;
32 class TargetRegisterInfo;
33 
34 /// Holds a DIExpression and keeps track of how many operands have been consumed
35 /// so far.
38 
39 public:
41  if (!Expr) {
42  assert(Start == End);
43  return;
44  }
45  Start = Expr->expr_op_begin();
46  End = Expr->expr_op_end();
47  }
48 
50  : Start(Expr.begin()), End(Expr.end()) {}
51 
52  DIExpressionCursor(const DIExpressionCursor &) = default;
53 
54  /// Consume one operation.
56  if (Start == End)
57  return None;
58  return *(Start++);
59  }
60 
61  /// Consume N operations.
62  void consume(unsigned N) { std::advance(Start, N); }
63 
64  /// Return the current operation.
66  if (Start == End)
67  return None;
68  return *(Start);
69  }
70 
71  /// Return the next operation.
73  if (Start == End)
74  return None;
75 
76  auto Next = Start.getNext();
77  if (Next == End)
78  return None;
79 
80  return *Next;
81  }
82 
83  /// Determine whether there are any operations left in this expression.
84  operator bool() const { return Start != End; }
85 
86  DIExpression::expr_op_iterator begin() const { return Start; }
87  DIExpression::expr_op_iterator end() const { return End; }
88 
89  /// Retrieve the fragment information, if any.
91  return DIExpression::getFragmentInfo(Start, End);
92  }
93 };
94 
95 /// Base class containing the logic for constructing DWARF expressions
96 /// independently of whether they are emitted into a DIE or into a .debug_loc
97 /// entry.
99 protected:
100  /// Holds information about all subregisters comprising a register location.
101  struct Register {
103  unsigned Size;
104  const char *Comment;
105  };
106 
108 
109  /// The register location, if any.
111 
112  /// Current Fragment Offset in Bits.
113  uint64_t OffsetInBits = 0;
114  unsigned DwarfVersion;
115 
116  /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
117  unsigned SubRegisterSizeInBits = 0;
118  unsigned SubRegisterOffsetInBits = 0;
119 
120  /// The kind of location description being produced.
121  enum { Unknown = 0, Register, Memory, Implicit } LocationKind = Unknown;
122 
123  /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
124  /// to represent a subregister.
125  void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
126  SubRegisterSizeInBits = SizeInBits;
127  SubRegisterOffsetInBits = OffsetInBits;
128  }
129 
130  /// Add masking operations to stencil out a subregister.
131  void maskSubRegister();
132 
133  /// Output a dwarf operand and an optional assembler comment.
134  virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
135 
136  /// Emit a raw signed value.
137  virtual void emitSigned(int64_t Value) = 0;
138 
139  /// Emit a raw unsigned value.
140  virtual void emitUnsigned(uint64_t Value) = 0;
141 
142  virtual void emitBaseTypeRef(uint64_t Idx) = 0;
143 
144  /// Emit a normalized unsigned constant.
145  void emitConstu(uint64_t Value);
146 
147  /// Return whether the given machine register is the frame register in the
148  /// current function.
149  virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
150 
151  /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
152  /// register location description.
153  void addReg(int DwarfReg, const char *Comment = nullptr);
154 
155  /// Emit a DW_OP_breg operation.
156  void addBReg(int DwarfReg, int Offset);
157 
158  /// Emit DW_OP_fbreg <Offset>.
159  void addFBReg(int Offset);
160 
161  /// Emit a partial DWARF register operation.
162  ///
163  /// \param MachineReg The register number.
164  /// \param MaxSize If the register must be composed from
165  /// sub-registers this is an upper bound
166  /// for how many bits the emitted DW_OP_piece
167  /// may cover.
168  ///
169  /// If size and offset is zero an operation for the entire register is
170  /// emitted: Some targets do not provide a DWARF register number for every
171  /// register. If this is the case, this function will attempt to emit a DWARF
172  /// register by emitting a fragment of a super-register or by piecing together
173  /// multiple subregisters that alias the register.
174  ///
175  /// \return false if no DWARF register exists for MachineReg.
176  bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
177  unsigned MaxSize = ~1U);
178 
179  /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
180  /// \param OffsetInBits This is an optional offset into the location that
181  /// is at the top of the DWARF stack.
182  void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
183 
184  /// Emit a shift-right dwarf operation.
185  void addShr(unsigned ShiftBy);
186 
187  /// Emit a bitwise and dwarf operation.
188  void addAnd(unsigned Mask);
189 
190  /// Emit a DW_OP_stack_value, if supported.
191  ///
192  /// The proper way to describe a constant value is DW_OP_constu <const>,
193  /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
194  /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
195  /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
196  /// <const> actually describes a value at a constant address, not a constant
197  /// value. However, in the past there was no better way to describe a
198  /// constant value, so the producers and consumers started to rely on
199  /// heuristics to disambiguate the value vs. location status of the
200  /// expression. See PR21176 for more details.
201  void addStackValue();
202 
203  ~DwarfExpression() = default;
204 
205 public:
206  DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU)
207  : CU(CU), DwarfVersion(DwarfVersion) {}
208 
209  /// This needs to be called last to commit any pending changes.
210  void finalize();
211 
212  /// Emit a signed constant.
213  void addSignedConstant(int64_t Value);
214 
215  /// Emit an unsigned constant.
216  void addUnsignedConstant(uint64_t Value);
217 
218  /// Emit an unsigned constant.
219  void addUnsignedConstant(const APInt &Value);
220 
221  bool isMemoryLocation() const { return LocationKind == Memory; }
222  bool isUnknownLocation() const { return LocationKind == Unknown; }
223 
224  /// Lock this down to become a memory location description.
226  assert(LocationKind == Unknown);
227  LocationKind = Memory;
228  }
229 
230  /// Emit a machine register location. As an optimization this may also consume
231  /// the prefix of a DwarfExpression if a more efficient representation for
232  /// combining the register location and the first operation exists.
233  ///
234  /// \param FragmentOffsetInBits If this is one fragment out of a
235  /// fragmented
236  /// location, this is the offset of the
237  /// fragment inside the entire variable.
238  /// \return false if no DWARF register exists
239  /// for MachineReg.
240  bool addMachineRegExpression(const TargetRegisterInfo &TRI,
241  DIExpressionCursor &Expr, unsigned MachineReg,
242  unsigned FragmentOffsetInBits = 0);
243 
244  /// Emit all remaining operations in the DIExpressionCursor.
245  ///
246  /// \param FragmentOffsetInBits If this is one fragment out of multiple
247  /// locations, this is the offset of the
248  /// fragment inside the entire variable.
249  void addExpression(DIExpressionCursor &&Expr,
250  unsigned FragmentOffsetInBits = 0);
251 
252  /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
253  /// the fragment described by \c Expr.
254  void addFragmentOffset(const DIExpression *Expr);
255 
256  void emitLegacySExt(unsigned FromBits);
257  void emitLegacyZExt(unsigned FromBits);
258 };
259 
260 /// DwarfExpression implementation for .debug_loc entries.
262  ByteStreamer &BS;
263 
264  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
265  void emitSigned(int64_t Value) override;
266  void emitUnsigned(uint64_t Value) override;
267  void emitBaseTypeRef(uint64_t Idx) override;
268  bool isFrameRegister(const TargetRegisterInfo &TRI,
269  unsigned MachineReg) override;
270 
271 public:
273  : DwarfExpression(DwarfVersion, CU), BS(BS) {}
274 };
275 
276 /// DwarfExpression implementation for singular DW_AT_location.
277 class DIEDwarfExpression final : public DwarfExpression {
278 const AsmPrinter &AP;
279  DIELoc &DIE;
280 
281  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
282  void emitSigned(int64_t Value) override;
283  void emitUnsigned(uint64_t Value) override;
284  void emitBaseTypeRef(uint64_t Idx) override;
285  bool isFrameRegister(const TargetRegisterInfo &TRI,
286  unsigned MachineReg) override;
287 public:
289 
292  return &DIE;
293  }
294 };
295 
296 } // end namespace llvm
297 
298 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
DIELoc - Represents an expression location.
Definition: DIE.h:891
This class represents lattice values for constants.
Definition: AllocatorList.h:23
arc branch finalize
void setMemoryLocationKind()
Lock this down to become a memory location description.
This class provides various memory handling functions that manipulate MemoryBlock instances...
Definition: Memory.h:46
Base class containing the logic for constructing DWARF expressions independently of whether they are ...
unsigned const TargetRegisterInfo * TRI
DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU)
expr_op_iterator expr_op_begin() const
Visit the elements via ExprOperand wrappers.
Holds a DIExpression and keeps track of how many operands have been consumed so far.
DwarfExpression implementation for .debug_loc entries.
void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits)
Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed to represent a subregister...
expr_op_iterator expr_op_end() const
Optional< DIExpression::ExprOperand > peek() const
Return the current operation.
Optional< DIExpression::ExprOperand > peekNext() const
Return the next operation.
Optional< DIExpression::ExprOperand > take()
Consume one operation.
DIExpressionCursor(const DIExpression *Expr)
A structured debug information entry.
Definition: DIE.h:700
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
Optional< FragmentInfo > getFragmentInfo() const
Retrieve the details of this fragment expression.
bool isMemoryLocation() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:841
bool isUnknownLocation() const
Promote Memory to Register
Definition: Mem2Reg.cpp:109
DWARF expression.
Class for arbitrary precision integers.
Definition: APInt.h:69
Optional< DIExpression::FragmentInfo > getFragmentInfo() const
Retrieve the fragment information, if any.
void consume(unsigned N)
Consume N operations.
DIExpression::expr_op_iterator begin() const
void finalize()
This needs to be called last to commit any pending changes.
#define N
DIExpressionCursor(ArrayRef< uint64_t > Expr)
DwarfExpression implementation for singular DW_AT_location.
Holds information about all subregisters comprising a register location.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:72
DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS, DwarfCompileUnit &CU)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
expr_op_iterator getNext() const
Get the next iterator.
An iterator for expression operands.
DwarfCompileUnit & CU
SmallVector< Register, 2 > DwarfRegs
The register location, if any.
DIExpression::expr_op_iterator end() const