LLVM 20.0.0git
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This file is part of the ARC Disassembler. More...
#include "ARC.h"
#include "ARCRegisterInfo.h"
#include "MCTargetDesc/ARCMCTargetDesc.h"
#include "TargetInfo/ARCTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "ARCGenDisassemblerTables.inc"
Go to the source code of this file.
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#define | DEBUG_TYPE "arc-disassembler" |
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using | DecodeStatus = MCDisassembler::DecodeStatus |
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static const uint16_t | GPR32DecoderTable [] |
This file is part of the ARC Disassembler.
Definition in file ARCDisassembler.cpp.
#define DEBUG_TYPE "arc-disassembler" |
Definition at line 28 of file ARCDisassembler.cpp.
Definition at line 30 of file ARCDisassembler.cpp.
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Definition at line 411 of file ARCDisassembler.cpp.
Referenced by LLVMInitializeARCDisassembler().
Definition at line 165 of file ARCDisassembler.cpp.
References Insn.
Referenced by DecodeLdLImmInstruction(), and DecodeLdRLImmInstruction().
Definition at line 160 of file ARCDisassembler.cpp.
References Insn.
Referenced by DecodeCCRU6Instruction(), DecodeLdLImmInstruction(), DecodeLdRLImmInstruction(), DecodeSOPwithRS12(), DecodeSOPwithRU6(), and DecodeStLImmInstruction().
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Definition at line 197 of file ARCDisassembler.cpp.
References B, DecodeSymbolicOperandOff(), and llvm::MCDisassembler::Success.
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Definition at line 307 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::dbgs(), decodeBField(), DecodeGPR32RegisterClass(), Insn, LLVM_DEBUG, and llvm::MCDisassembler::Success.
Definition at line 156 of file ARCDisassembler.cpp.
References Insn.
Referenced by DecodeLdRLImmInstruction(), and DecodeStLImmInstruction().
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Definition at line 218 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), B, llvm::MCOperand::createImm(), llvm::max(), and llvm::MCDisassembler::Success.
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Definition at line 144 of file ARCDisassembler.cpp.
References DecodeGPR32RegisterClass().
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Definition at line 131 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::dbgs(), llvm::MCDisassembler::Fail, GPR32DecoderTable, LLVM_DEBUG, and llvm::MCDisassembler::Success.
Referenced by DecodeCCRU6Instruction(), DecodeGBR32ShortRegister(), DecodeLdLImmInstruction(), DecodeLdRLImmInstruction(), DecodeMEMrs9(), DecodeMoveHRegInstruction(), DecodeSOPwithRS12(), DecodeSOPwithRU6(), and DecodeStLImmInstruction().
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Definition at line 246 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::dbgs(), decodeAField(), decodeBField(), DecodeGPR32RegisterClass(), llvm::MCDisassembler::Fail, Insn, LLVM_DEBUG, and llvm::MCDisassembler::Success.
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Definition at line 264 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::dbgs(), decodeAField(), decodeBField(), decodeCField(), DecodeGPR32RegisterClass(), llvm::MCDisassembler::Fail, Insn, LLVM_DEBUG, and llvm::MCDisassembler::Success.
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Definition at line 169 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 281 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::dbgs(), DecodeGPR32RegisterClass(), llvm::MCDisassembler::Fail, G, H, Insn, LLVM_DEBUG, and llvm::MCDisassembler::Success.
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Definition at line 207 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), B, llvm::MCOperand::createImm(), llvm::maskTrailingOnes(), and llvm::MCDisassembler::Success.
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Definition at line 333 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), decodeBField(), DecodeGPR32RegisterClass(), Insn, llvm::Lower, llvm::MCDisassembler::Success, and llvm::Upper.
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Definition at line 322 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), decodeBField(), DecodeGPR32RegisterClass(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 229 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::dbgs(), decodeBField(), decodeCField(), DecodeGPR32RegisterClass(), llvm::MCDisassembler::Fail, Insn, LLVM_DEBUG, and llvm::MCDisassembler::Success.
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Definition at line 179 of file ARCDisassembler.cpp.
References llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeSymbolicOperandOff().
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Definition at line 187 of file ARCDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSymbolicOperand(), and llvm::Offset.
Referenced by DecodeBranchTargetS().
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCDisassembler | ( | ) |
Definition at line 417 of file ARCDisassembler.cpp.
References createARCDisassembler(), llvm::getTheARCTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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Definition at line 78 of file ARCDisassembler.cpp.
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Definition at line 50 of file ARCDisassembler.cpp.
Referenced by llvm::LanaiDisassembler::getInstruction().
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Definition at line 69 of file ARCDisassembler.cpp.
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Definition at line 59 of file ARCDisassembler.cpp.
Definition at line 124 of file ARCDisassembler.cpp.
Referenced by DecodeGPR32RegisterClass().