Go to the source code of this file.
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namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations.
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void | llvm::initializeARMExecutionDomainFixPass (PassRegistry &) |
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LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeARMTarget () |
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static std::unique_ptr< TargetLoweringObjectFile > | createTLOF (const Triple &TT) |
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static ARMBaseTargetMachine::ARMABI | computeTargetABI (const Triple &TT, StringRef CPU, const TargetOptions &Options) |
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static std::string | computeDataLayout (const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) |
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static Reloc::Model | getEffectiveRelocModel (const Triple &TT, std::optional< Reloc::Model > RM) |
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| INITIALIZE_PASS_BEGIN (ARMExecutionDomainFix, "arm-execution-domain-fix", "ARM Execution Domain Fix", false, false) INITIALIZE_PASS_END(ARMExecutionDomainFix |
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static cl::opt< bool > | DisableA15SDOptimization ("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false)) |
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static cl::opt< bool > | EnableAtomicTidy ("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true)) |
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static cl::opt< bool > | EnableARMLoadStoreOpt ("arm-load-store-opt", cl::Hidden, cl::desc("Enable ARM load/store optimization pass"), cl::init(true)) |
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static cl::opt< cl::boolOrDefault > | EnableGlobalMerge ("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")) |
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arm execution domain | fix |
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arm execution domain ARM Execution Domain | Fix |
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arm execution domain ARM Execution Domain | false |
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◆ computeDataLayout()
◆ computeTargetABI()
◆ createTLOF()
◆ getEffectiveRelocModel()
◆ INITIALIZE_PASS_BEGIN()
INITIALIZE_PASS_BEGIN |
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ARMExecutionDomainFix |
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"arm-execution-domain-fix" |
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"ARM Execution Domain Fix" |
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false |
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false |
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◆ LLVMInitializeARMTarget()
Definition at line 87 of file ARMTargetMachine.cpp.
References A, B, llvm::PassRegistry::getPassRegistry(), llvm::getTheARMBETarget(), llvm::getTheARMLETarget(), llvm::getTheThumbBETarget(), llvm::getTheThumbLETarget(), llvm::initializeARMBlockPlacementPass(), llvm::initializeARMBranchTargetsPass(), llvm::initializeARMConstantIslandsPass(), llvm::initializeARMDAGToDAGISelLegacyPass(), llvm::initializeARMExecutionDomainFixPass(), llvm::initializeARMExpandPseudoPass(), llvm::initializeARMFixCortexA57AES1742098Pass(), llvm::initializeARMLoadStoreOptPass(), llvm::initializeARMLowOverheadLoopsPass(), llvm::initializeARMParallelDSPPass(), llvm::initializeARMPreAllocLoadStoreOptPass(), llvm::initializeARMSLSHardeningPass(), llvm::initializeGlobalISel(), llvm::initializeMVEGatherScatterLoweringPass(), llvm::initializeMVELaneInterleavingPass(), llvm::initializeMVETailPredicationPass(), llvm::initializeMVETPAndVPTOptimisationsPass(), llvm::initializeMVEVPTBlockPass(), llvm::initializeThumb2SizeReducePass(), X, and Y.
◆ DisableA15SDOptimization
cl::opt< bool > DisableA15SDOptimization("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false)) |
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"disable-a15-sd-optimization" |
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cl::Hidden |
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cl::desc("Inhibit optimization of S->D register accesses on A15") |
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cl::init(false) |
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◆ EnableARMLoadStoreOpt
◆ EnableAtomicTidy
cl::opt< bool > EnableAtomicTidy("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true)) |
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"arm-atomic-cfg-tidy" |
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cl::Hidden |
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cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information") |
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cl::init(true) |
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◆ EnableGlobalMerge
◆ false
◆ fix
◆ Fix