Go to the source code of this file.
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namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations.
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static cl::opt< unsigned > | VRegIndexCutoff ("insert-vreg-cutoff", cl::init(~0U), cl::Hidden, cl::desc("Vreg# cutoff for insert generation.")) |
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static cl::opt< unsigned > | VRegDistCutoff ("insert-dist-cutoff", cl::init(30U), cl::Hidden, cl::desc("Vreg distance cutoff for insert " "generation.")) |
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static cl::opt< unsigned > | MaxORLSize ("insert-max-orl", cl::init(4096), cl::Hidden, cl::desc("Maximum size of OrderedRegisterList")) |
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static cl::opt< unsigned > | MaxIFMSize ("insert-max-ifmap", cl::init(1024), cl::Hidden, cl::desc("Maximum size of IFMap")) |
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static cl::opt< bool > | OptTiming ("insert-timing", cl::Hidden, cl::desc("Enable timing of insert generation")) |
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static cl::opt< bool > | OptTimingDetail ("insert-timing-detail", cl::Hidden, cl::desc("Enable detailed timing of insert " "generation")) |
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static cl::opt< bool > | OptSelectAll0 ("insert-all0", cl::init(false), cl::Hidden) |
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static cl::opt< bool > | OptSelectHas0 ("insert-has0", cl::init(false), cl::Hidden) |
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static cl::opt< bool > | OptConst ("insert-const", cl::init(false), cl::Hidden) |
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| hexinsert |
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Hexagon generate insert | instructions |
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Hexagon generate insert | false |
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◆ DEBUG_TYPE
#define DEBUG_TYPE "hexinsert" |
◆ INITIALIZE_PASS_BEGIN()
INITIALIZE_PASS_BEGIN |
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HexagonGenInsert |
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"hexinsert" |
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"Hexagon generate \"insert\" instructions" |
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false |
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false |
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◆ isDebug()
◆ false
Hexagon generate insert false |
◆ hexinsert
◆ instructions
Hexagon generate insert instructions |
◆ MaxIFMSize
cl::opt< unsigned > MaxIFMSize("insert-max-ifmap", cl::init(1024), cl::Hidden, cl::desc("Maximum size of IFMap")) |
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"insert-max-ifmap" |
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cl::init(1024) |
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cl::Hidden |
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cl::desc("Maximum size of IFMap") |
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◆ MaxORLSize
cl::opt< unsigned > MaxORLSize("insert-max-orl", cl::init(4096), cl::Hidden, cl::desc("Maximum size of OrderedRegisterList")) |
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"insert-max-orl" |
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cl::init(4096) |
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cl::Hidden |
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cl::desc("Maximum size of OrderedRegisterList") |
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◆ OptConst
cl::opt< bool > OptConst("insert-const", cl::init(false), cl::Hidden) |
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"insert-const" |
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cl::init(false) |
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cl::Hidden |
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◆ OptSelectAll0
cl::opt< bool > OptSelectAll0("insert-all0", cl::init(false), cl::Hidden) |
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"insert-all0" |
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cl::init(false) |
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cl::Hidden |
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◆ OptSelectHas0
cl::opt< bool > OptSelectHas0("insert-has0", cl::init(false), cl::Hidden) |
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"insert-has0" |
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cl::init(false) |
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cl::Hidden |
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◆ OptTiming
cl::opt< bool > OptTiming("insert-timing", cl::Hidden, cl::desc("Enable timing of insert generation")) |
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"insert-timing" |
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cl::Hidden |
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cl::desc("Enable timing of insert generation") |
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◆ OptTimingDetail
cl::opt< bool > OptTimingDetail("insert-timing-detail", cl::Hidden, cl::desc("Enable detailed timing of insert " "generation")) |
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"insert-timing-detail" |
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cl::Hidden |
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cl::desc("Enable detailed timing of insert " "generation") |
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◆ VRegDistCutoff
cl::opt< unsigned > VRegDistCutoff("insert-dist-cutoff", cl::init(30U), cl::Hidden, cl::desc("Vreg distance cutoff for insert " "generation.")) |
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"insert-dist-cutoff" |
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cl::init(30U) |
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cl::Hidden |
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cl::desc("Vreg distance cutoff for insert " "generation.") |
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◆ VRegIndexCutoff
cl::opt< unsigned > VRegIndexCutoff("insert-vreg-cutoff", cl::init(~0U), cl::Hidden, cl::desc("Vreg# cutoff for insert generation.")) |
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"insert-vreg-cutoff" |
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cl::init(~0U) |
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cl::Hidden |
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cl::desc("Vreg# cutoff for insert generation.") |
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