SIMachineFunctionInfo.cpp File Reference

#include "SIMachineFunctionInfo.h"
#include "AMDGPUSubtarget.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIRegisterInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/Function.h"
#include <cassert>
#include <optional>
#include <vector>

Go to the source code of this file.

Enumerations
enum	{ MAX_LANES = 64 }

Functions
const GCNTargetMachine &	getTM (const GCNSubtarget *STI)
static yaml::StringValue	regToString (Register Reg, const TargetRegisterInfo &TRI)
static std::optional< yaml::SIArgumentInfo >	convertArgumentInfo (const AMDGPUFunctionArgInfo &ArgInfo, const TargetRegisterInfo &TRI)

Variables
static cl::opt< bool >	MFMAVGPRForm ("amdgpu-mfma-vgpr-form", cl::Hidden, cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If " "unspecified, default to compiler heuristics"), cl::init(false))

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
MAX_LANES

Definition at line 28 of file SIMachineFunctionInfo.cpp.

Function Documentation

convertArgumentInfo()

std::optional< yaml::SIArgumentInfo > convertArgumentInfo ( const AMDGPUFunctionArgInfo & ArgInfo, const TargetRegisterInfo & TRI )

static

Definition at line 673 of file SIMachineFunctionInfo.cpp.

References A(), llvm::yaml::SIArgument::createArgument(), llvm::yaml::SIArgumentInfo::DispatchID, llvm::yaml::SIArgumentInfo::DispatchPtr, llvm::yaml::SIArgumentInfo::FlatScratchInit, llvm::yaml::SIArgumentInfo::ImplicitArgPtr, llvm::yaml::SIArgumentInfo::ImplicitBufferPtr, llvm::yaml::SIArgumentInfo::KernargSegmentPtr, llvm::yaml::SIArgumentInfo::LDSKernelId, llvm::yaml::SIArgument::Mask, llvm::printReg(), llvm::yaml::SIArgumentInfo::PrivateSegmentBuffer, llvm::yaml::SIArgumentInfo::PrivateSegmentSize, llvm::yaml::SIArgumentInfo::PrivateSegmentWaveByteOffset, llvm::yaml::SIArgumentInfo::QueuePtr, llvm::yaml::SIArgument::RegisterName, llvm::yaml::SIArgument::StackOffset, TRI, llvm::yaml::StringValue::Value, llvm::yaml::SIArgumentInfo::WorkGroupIDX, llvm::yaml::SIArgumentInfo::WorkGroupIDY, llvm::yaml::SIArgumentInfo::WorkGroupIDZ, llvm::yaml::SIArgumentInfo::WorkGroupInfo, llvm::yaml::SIArgumentInfo::WorkItemIDX, llvm::yaml::SIArgumentInfo::WorkItemIDY, and llvm::yaml::SIArgumentInfo::WorkItemIDZ.

Referenced by llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getTM()

const GCNTargetMachine & getTM

(

const GCNSubtarget *

STI

)

Definition at line 42 of file SIMachineFunctionInfo.cpp.

References llvm::GCNSubtarget::getTargetLowering(), and llvm::TargetLoweringBase::getTargetMachine().

Referenced by llvm::SIMachineFunctionInfo::SIMachineFunctionInfo().

regToString()

yaml::StringValue regToString ( Register Reg, const TargetRegisterInfo & TRI )

static

Definition at line 662 of file SIMachineFunctionInfo.cpp.

References llvm::printReg(), Reg, TRI, and llvm::yaml::StringValue::Value.

Referenced by llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

Variable Documentation

MFMAVGPRForm

cl::opt< bool > MFMAVGPRForm("amdgpu-mfma-vgpr-form", cl::Hidden, cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If " "unspecified, default to compiler heuristics"), cl::init(false)) ( "amdgpu-mfma-vgpr-form" , cl::Hidden , cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If " "unspecified, default to compiler heuristics") , cl::init(false)  )

static

Referenced by llvm::SIMachineFunctionInfo::SIMachineFunctionInfo().