29#define DEBUG_TYPE "mccodeemitter"
39 : MCII(MCII), Ctx(Ctx) {}
41 ~SystemZMCCodeEmitter()
override =
default;
64 template <SystemZ::FixupKind Kind>
71 template <SystemZ::FixupKind Kind>
83 unsigned Kind, int64_t
Offset,
89 return getPCRelEncoding(
MI, OpNum, Fixups,
95 return getPCRelEncoding(
MI, OpNum, Fixups,
101 return getPCRelEncoding(
MI, OpNum, Fixups,
107 return getPCRelEncoding(
MI, OpNum, Fixups,
113 return getPCRelEncoding(
MI, OpNum, Fixups,
119 return getPCRelEncoding(
MI, OpNum, Fixups,
125 return getPCRelEncoding(
MI, OpNum, Fixups,
137void SystemZMCCodeEmitter::encodeInstruction(
const MCInst &
MI,
141 uint64_t
Bits = getBinaryCodeForInstr(
MI, Fixups, STI);
144 unsigned ShiftValue = (
Size * 8) - 8;
145 for (
unsigned I = 0;
I !=
Size; ++
I) {
146 CB.
push_back(uint8_t(Bits >> ShiftValue));
151uint64_t SystemZMCCodeEmitter::
152getMachineOpValue(
const MCInst &
MI,
const MCOperand &MO,
153 SmallVectorImpl<MCFixup> &Fixups,
154 const MCSubtargetInfo &STI)
const {
160 return static_cast<uint64_t
>(MO.
getImm());
164template <SystemZ::FixupKind Kind>
165uint64_t SystemZMCCodeEmitter::getImmOpValue(
const MCInst &
MI,
unsigned OpNum,
166 SmallVectorImpl<MCFixup> &Fixups,
167 const MCSubtargetInfo &STI)
const {
168 const MCOperand &MO =
MI.getOperand(OpNum);
170 return static_cast<uint64_t
>(MO.
getImm());
172 unsigned MIBitSize = MCII.
get(
MI.getOpcode()).
getSize() * 8;
173 uint32_t RawBitOffset = getOperandBitOffset(
MI, OpNum, STI);
176 uint32_t BitOffset = MIBitSize - RawBitOffset - OpBitSize;
183template <SystemZ::FixupKind Kind>
185SystemZMCCodeEmitter::getLenEncoding(
const MCInst &
MI,
unsigned OpNum,
186 SmallVectorImpl<MCFixup> &Fixups,
187 const MCSubtargetInfo &STI)
const {
188 return getImmOpValue<Kind>(
MI, OpNum, Fixups, STI) - 1;
192SystemZMCCodeEmitter::getPCRelEncoding(
const MCInst &
MI,
unsigned OpNum,
193 SmallVectorImpl<MCFixup> &Fixups,
194 unsigned Kind, int64_t
Offset,
195 bool AllowTLS)
const {
196 SMLoc Loc =
MI.getLoc();
197 const MCOperand &MO =
MI.getOperand(OpNum);
215 if (AllowTLS && OpNum + 1 <
MI.getNumOperands()) {
216 const MCOperand &MOTLS =
MI.getOperand(OpNum + 1);
222#define GET_OPERAND_BIT_OFFSET
223#include "SystemZGenMCCodeEmitter.inc"
227 return new SystemZMCCodeEmitter(MCII, Ctx);
static void addFixup(SmallVectorImpl< MCFixup > &Fixups, uint32_t Offset, const MCExpr *Value, uint16_t Kind, bool PCRel=false)
This file defines the SmallVector class.
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())
MCCodeEmitter - Generic instruction encoding interface.
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Context object for machine code objects.
const MCRegisterInfo * getRegisterInfo() const
Base class for the full range of assembler expressions which are needed for parsing.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, bool PCRel=false)
Consider bit fields if we need more flags.
Instances of this class represent a single low-level machine instruction.
unsigned getSize() const
Return the number of bytes in the encoding of this instruction, or zero if the encoding size cannot b...
Interface to description of machine instruction set.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Instances of this class represent operands of the MCInst class.
MCRegister getReg() const
Returns the register number.
const MCExpr * getExpr() const
uint16_t getEncodingValue(MCRegister Reg) const
Returns the encoding for Reg.
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
LLVM Value Representation.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static const MCFixupKindInfo MCFixupKindInfos[SystemZ::NumTargetFixupKinds]
This is an optimization pass for GlobalISel generic memory operations.
static void addFixup(SmallVectorImpl< MCFixup > &Fixups, uint32_t Offset, const MCExpr *Value, uint16_t Kind)
MCCodeEmitter * createSystemZMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
uint8_t TargetSize
The number of bits written by this fixup.