LLVM 20.0.0git
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#include "ThumbRegisterInfo.h"
#include "ARMBaseInstrInfo.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Target/TargetMachine.h"
Go to the source code of this file.
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
Functions | |
static void | emitThumb1LoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) |
static void | emitThumb2LoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) |
static void | emitThumbRegPlusImmInReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, Register DestReg, Register BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo &MRI, unsigned MIFlags=MachineInstr::NoFlags) |
emitThumbRegPlusImmInReg - Emits a series of instructions to materialize a destreg = basereg + immediate in Thumb code. | |
static void | removeOperands (MachineInstr &MI, unsigned i) |
static unsigned | convertToNonSPOpcode (unsigned Opcode) |
convertToNonSPOpcode - Change the opcode to the non-SP version, because we're replacing the frame index with a non-SP register. | |
Variables | |
cl::opt< bool > | llvm::ReuseFrameIndexVals |
convertToNonSPOpcode - Change the opcode to the non-SP version, because we're replacing the frame index with a non-SP register.
Definition at line 412 of file ThumbRegisterInfo.cpp.
Referenced by llvm::ThumbRegisterInfo::rewriteFrameIndex().
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Definition at line 61 of file ThumbRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CallingConv::C, llvm::MachineFunction::getConstantPool(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::ARMSubtarget::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), Idx, MBB, MBBI, llvm::MachineInstrBuilder::setMIFlags(), and TII.
Referenced by llvm::ThumbRegisterInfo::emitLoadConstPool().
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Definition at line 81 of file ThumbRegisterInfo.cpp.
References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::BuildMI(), llvm::CallingConv::C, llvm::MachineFunction::getConstantPool(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), Idx, MBB, MBBI, llvm::predOps(), llvm::MachineInstrBuilder::setMIFlags(), and TII.
Referenced by llvm::ThumbRegisterInfo::emitLoadConstPool().
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emitThumbRegPlusImmInReg - Emits a series of instructions to materialize a destreg = basereg + immediate in Thumb code.
Materialize the immediate in a register using mov / mvn (armv6-M >) sequences, movs / lsls / adds / lsls / adds / lsls / adds sequences (armv6-M) or load the immediate from a constpool entry.
Definition at line 124 of file ThumbRegisterInfo.cpp.
References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::any_of(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstrBuilder::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::RegState::Implicit, llvm::MachineBasicBlock::instr_end(), llvm::isARMLowRegister(), llvm::Register::isVirtual(), llvm::RegState::Kill, llvm::MachineBasicBlock::liveouts(), MBB, MBBI, MRI, llvm::predOps(), llvm::MachineInstrBuilder::setMIFlags(), llvm::t1CondCodeOp(), and TII.
Referenced by llvm::ThumbRegisterInfo::eliminateFrameIndex(), and llvm::emitThumbRegPlusImmediate().
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Definition at line 404 of file ThumbRegisterInfo.cpp.
References MI.
Referenced by llvm::ThumbRegisterInfo::eliminateFrameIndex().