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CSKYAsmBackend.h
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1 //===-- CSKYAsmBackend.h - CSKY Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYASMBACKEND_H
10 #define LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYASMBACKEND_H
11 
13 #include "llvm/MC/MCAsmBackend.h"
16 
17 namespace llvm {
18 
19 class CSKYAsmBackend : public MCAsmBackend {
20 
21 public:
24 
25  unsigned int getNumFixupKinds() const override {
27  }
28 
29  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
31  uint64_t Value, bool IsResolved,
32  const MCSubtargetInfo *STI) const override;
33 
34  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
35 
36  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
37  const MCRelaxableFragment *DF,
38  const MCAsmLayout &Layout) const override;
39 
40  void relaxInstruction(MCInst &Inst,
41  const MCSubtargetInfo &STI) const override;
42 
43  bool mayNeedRelaxation(const MCInst &Inst,
44  const MCSubtargetInfo &STI) const override;
45 
46  bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
48  const MCRelaxableFragment *DF,
49  const MCAsmLayout &Layout,
50  const bool WasForced) const override;
51 
52  bool writeNopData(raw_ostream &OS, uint64_t Count,
53  const MCSubtargetInfo *STI) const override;
54 
55  bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56  const MCValue &Target) override;
57 
58  std::unique_ptr<MCObjectTargetWriter>
59  createObjectTargetWriter() const override;
60 };
61 } // namespace llvm
62 
63 #endif // LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYASMBACKEND_H
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:270
llvm::CSKYAsmBackend
Definition: CSKYAsmBackend.h:19
MCTargetOptions.h
llvm::CSKYAsmBackend::mayNeedRelaxation
bool mayNeedRelaxation(const MCInst &Inst, const MCSubtargetInfo &STI) const override
Check whether the given instruction may need relaxation.
Definition: CSKYAsmBackend.cpp:242
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::CSKYAsmBackend::getNumFixupKinds
unsigned int getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Definition: CSKYAsmBackend.h:25
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:42
MCAsmBackend.h
llvm::MutableArrayRef< char >
llvm::support::little
@ little
Definition: Endian.h:27
llvm::CSKYAsmBackend::applyFixup
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Definition: CSKYAsmBackend.cpp:201
MCSubtargetInfo.h
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::CSKYAsmBackend::CSKYAsmBackend
CSKYAsmBackend(const MCSubtargetInfo &STI, const MCTargetOptions &OP)
Definition: CSKYAsmBackend.h:22
llvm::MCAssembler
Definition: MCAssembler.h:73
llvm::CSKYAsmBackend::shouldForceRelocation
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Definition: CSKYAsmBackend.cpp:263
uint64_t
llvm::CSKYAsmBackend::writeNopData
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
Definition: CSKYAsmBackend.cpp:347
llvm::CSKYAsmBackend::createObjectTargetWriter
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
Definition: CSKYAsmBackend.cpp:24
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
OP
#define OP(n)
Definition: regex2.h:73
llvm::MCTargetOptions
Definition: MCTargetOptions.h:42
llvm::CSKYAsmBackend::relaxInstruction
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
Definition: CSKYAsmBackend.cpp:292
llvm::CSKYAsmBackend::fixupNeedsRelaxationAdvanced
bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout, const bool WasForced) const override
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed...
Definition: CSKYAsmBackend.cpp:174
llvm::CSKY::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: CSKYFixupKinds.h:56
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::CSKYAsmBackend::getFixupKindInfo
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition: CSKYAsmBackend.cpp:29
CSKYFixupKinds.h
llvm::CSKYAsmBackend::fixupNeedsRelaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
Definition: CSKYAsmBackend.cpp:286
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
support
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
Definition: README.txt:10
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:36
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::Value
LLVM Value Representation.
Definition: Value.h:74