LLVM  14.0.0git
CSKYAsmBackend.cpp
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1 //===-- CSKYAsmBackend.cpp - CSKY Assembler Backend -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "CSKYAsmBackend.h"
11 #include "llvm/ADT/DenseMap.h"
12 #include "llvm/MC/MCAsmLayout.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCContext.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/Support/Debug.h"
18 
19 #define DEBUG_TYPE "csky-asmbackend"
20 
21 using namespace llvm;
22 
23 std::unique_ptr<MCObjectTargetWriter>
26 }
27 
28 const MCFixupKindInfo &
30 
32  {CSKY::Fixups::fixup_csky_addr32, {"fixup_csky_addr32", 0, 32, 0}},
34  {"fixup_csky_pcrel_imm16_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}},
36  {"fixup_csky_pcrel_uimm16_scale4", 0, 32, MCFixupKindInfo::FKF_IsPCRel}},
38  {"fixup_csky_pcrel_imm26_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}},
40  {"fixup_csky_pcrel_imm18_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}}};
42  "Not all fixup kinds added to Infos array");
43 
45  "Invalid kind!");
47  return Infos[Kind];
48  else if (Kind < FirstTargetFixupKind)
50  else
52 }
53 
55  MCContext &Ctx) {
56  switch (Fixup.getTargetKind()) {
57  default:
58  llvm_unreachable("Unknown fixup kind!");
59  case FK_Data_1:
60  case FK_Data_2:
61  case FK_Data_4:
62  case FK_Data_8:
63  return Value;
65  return Value & 0xffffffff;
67  if (!isIntN(17, Value))
68  Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
69  if (Value & 0x1)
70  Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
71 
72  return (Value >> 1) & 0xffff;
74  if (!isUIntN(18, Value))
75  Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
76  if (Value & 0x3)
77  Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
78 
79  return (Value >> 2) & 0xffff;
81  if (!isIntN(27, Value))
82  Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
83  if (Value & 0x1)
84  Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
85 
86  return (Value >> 1) & 0x3ffffff;
88  if (!isIntN(19, Value))
89  Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
90  if (Value & 0x1)
91  Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
92 
93  return (Value >> 1) & 0x3ffff;
94  }
95 }
96 
98  const MCValue &Target,
100  bool IsResolved,
101  const MCSubtargetInfo *STI) const {
102  MCFixupKind Kind = Fixup.getKind();
104  return;
105  MCContext &Ctx = Asm.getContext();
107  if (!Value)
108  return; // Doesn't change encoding.
109  // Apply any target-specific value adjustments.
111 
112  // Shift the value into position.
113  Value <<= Info.TargetOffset;
114 
115  unsigned Offset = Fixup.getOffset();
116  unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
117 
118  assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
119 
120  // For each byte of the fragment that the fixup touches, mask in the
121  // bits from the fixup value.
122  bool IsLittleEndian = (Endian == support::little);
123 
124  if (IsLittleEndian && (NumBytes == 4)) {
125  Data[Offset + 0] |= uint8_t((Value >> 16) & 0xff);
126  Data[Offset + 1] |= uint8_t((Value >> 24) & 0xff);
127  Data[Offset + 2] |= uint8_t(Value & 0xff);
128  Data[Offset + 3] |= uint8_t((Value >> 8) & 0xff);
129  } else {
130  for (unsigned I = 0; I != NumBytes; I++) {
131  unsigned Idx = IsLittleEndian ? I : (NumBytes - 1 - I);
132  Data[Offset + Idx] |= uint8_t((Value >> (I * 8)) & 0xff);
133  }
134  }
135 }
136 
138  const MCRelaxableFragment *DF,
139  const MCAsmLayout &Layout) const {
140  return false;
141 }
142 
144  const MCSubtargetInfo &STI) const {
145  llvm_unreachable("CSKYAsmBackend::relaxInstruction() unimplemented");
146 }
147 
149  const MCSubtargetInfo *STI) const {
150  if (Count % 2)
151  return false;
152 
153  // MOV32 r0, r0
154  while (Count >= 4) {
155  OS.write("\xc4\x00\x48\x20", 4);
156  Count -= 4;
157  }
158  // MOV16 r0, r0
159  if (Count)
160  OS.write("\x6c\x03", 2);
161 
162  return true;
163 }
164 
166  const MCSubtargetInfo &STI,
167  const MCRegisterInfo &MRI,
168  const MCTargetOptions &Options) {
169  return new CSKYAsmBackend(STI, Options);
170 }
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:148
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
llvm::MCAsmBackend::getFixupKindInfo
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
Definition: MCAsmBackend.cpp:74
llvm::CSKYAsmBackend
Definition: CSKYAsmBackend.h:18
T
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::FirstTargetFixupKind
@ FirstTargetFixupKind
Definition: MCFixup.h:45
MCAssembler.h
DenseMap.h
MCFixupKindInfo.h
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::CSKYAsmBackend::getNumFixupKinds
unsigned int getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Definition: CSKYAsmBackend.h:24
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::MCAsmBackend::Endian
const support::endianness Endian
Definition: MCAsmBackend.h:45
llvm::FirstLiteralRelocationKind
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
Definition: MCFixup.h:50
x3
In x86 we generate this spiffy xmm0 xmm0 ret in x86 we generate this which could be xmm1 movss xmm1 xmm0 ret In sse4 we could use insertps to make both better Here s another testcase that could use x3
Definition: README-SSE.txt:547
llvm::FK_Data_4
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
llvm::MutableArrayRef< char >
llvm::support::little
@ little
Definition: Endian.h:27
CSKYAsmBackend.h
llvm::CSKYAsmBackend::applyFixup
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Definition: CSKYAsmBackend.cpp:97
MCContext.h
llvm::isUIntN
bool isUIntN(unsigned N, uint64_t x)
Checks if an unsigned integer fits into the given (dynamic) bit width.
Definition: MathExtras.h:455
llvm::createCSKYAsmBackend
MCAsmBackend * createCSKYAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: CSKYAsmBackend.cpp:165
llvm::raw_ostream::write
raw_ostream & write(unsigned char C)
Definition: raw_ostream.cpp:220
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::isIntN
bool isIntN(unsigned N, int64_t x)
Checks if an signed integer fits into the given (dynamic) bit width.
Definition: MathExtras.h:460
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::CSKY::fixup_csky_pcrel_imm26_scale2
@ fixup_csky_pcrel_imm26_scale2
Definition: CSKYFixupKinds.h:23
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::CSKY::fixup_csky_pcrel_imm16_scale2
@ fixup_csky_pcrel_imm16_scale2
Definition: CSKYFixupKinds.h:19
llvm::MCAssembler
Definition: MCAssembler.h:60
uint64_t
llvm::CSKYAsmBackend::writeNopData
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
Definition: CSKYAsmBackend.cpp:148
llvm::MCFixupKindInfo::FKF_IsPCRel
@ FKF_IsPCRel
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
Definition: MCFixupKindInfo.h:19
llvm::DenseMap
Definition: DenseMap.h:714
I
#define I(x, y, z)
Definition: MD5.cpp:59
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::CSKYAsmBackend::createObjectTargetWriter
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
Definition: CSKYAsmBackend.cpp:24
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
CSKYMCTargetDesc.h
llvm::MCContext::reportError
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:963
llvm::CSKY::fixup_csky_pcrel_uimm16_scale4
@ fixup_csky_pcrel_uimm16_scale4
Definition: CSKYFixupKinds.h:21
llvm::FK_Data_1
@ FK_Data_1
A one-byte fixup.
Definition: MCFixup.h:23
llvm::MCTargetOptions
Definition: MCTargetOptions.h:36
llvm::FK_NONE
@ FK_NONE
A no-op fixup.
Definition: MCFixup.h:22
llvm::CSKYAsmBackend::relaxInstruction
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
Definition: CSKYAsmBackend.cpp:143
Fixup
PowerPC TLS Dynamic Call Fixup
Definition: PPCTLSDynamicCall.cpp:235
adjustFixupValue
static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, MCContext &Ctx)
Definition: CSKYAsmBackend.cpp:54
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::CSKY::fixup_csky_pcrel_imm18_scale2
@ fixup_csky_pcrel_imm18_scale2
Definition: CSKYFixupKinds.h:25
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
MCAsmLayout.h
llvm::createCSKYELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createCSKYELFObjectWriter()
Definition: CSKYELFObjectWriter.cpp:43
MCObjectWriter.h
llvm::CSKY::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: CSKYFixupKinds.h:29
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::CSKYAsmBackend::getFixupKindInfo
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition: CSKYAsmBackend.cpp:29
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::size
unsigned size() const
Definition: DenseMap.h:100
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::CSKYAsmBackend::fixupNeedsRelaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
Definition: CSKYAsmBackend.cpp:137
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
llvm::FK_Data_8
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::CSKY::fixup_csky_addr32
@ fixup_csky_addr32
Definition: CSKYFixupKinds.h:17
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
llvm::FK_Data_2
@ FK_Data_2
A two-byte fixup.
Definition: MCFixup.h:24
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
Debug.h