LLVM  16.0.0git
CSKYMCCodeEmitter.h
Go to the documentation of this file.
1 //===-- CSKYMCCodeEmitter.cpp - CSKY Code Emitter interface ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the CSKYMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
14 #define LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
15 
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCContext.h"
20 
21 namespace llvm {
22 
23 class MCInstrInfo;
24 
26  MCContext &Ctx;
27  const MCInstrInfo &MII;
28 
29 public:
31  : Ctx(Ctx), MII(MII) {}
32 
34 
35  void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
37  const MCSubtargetInfo &STI) const override;
38 
39  // Generated by tablegen.
42  const MCSubtargetInfo &STI) const;
43 
44  // Default encoding method used by tablegen.
45  unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
47  const MCSubtargetInfo &STI) const;
48 
49  template <int shift = 0>
50  unsigned getImmOpValue(const MCInst &MI, unsigned Idx,
52  const MCSubtargetInfo &STI) const {
53  const MCOperand &MO = MI.getOperand(Idx);
54  if (MO.isImm())
55  return (MO.getImm() >> shift);
56 
57  assert(MO.isExpr() && "Unexpected MO type.");
58 
59  MCFixupKind Kind = getTargetFixup(MO.getExpr());
60  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
61  return 0;
62  }
63 
64  unsigned getRegSeqImmOpValue(const MCInst &MI, unsigned Idx,
66  const MCSubtargetInfo &STI) const;
67 
68  unsigned getRegisterSeqOpValue(const MCInst &MI, unsigned Op,
70  const MCSubtargetInfo &STI) const;
71 
72  unsigned getOImmOpValue(const MCInst &MI, unsigned Idx,
74  const MCSubtargetInfo &STI) const;
75 
76  unsigned getImmOpValueIDLY(const MCInst &MI, unsigned Idx,
78  const MCSubtargetInfo &STI) const;
79 
80  unsigned getImmJMPIX(const MCInst &MI, unsigned Idx,
82  const MCSubtargetInfo &STI) const;
83 
84  unsigned getImmOpValueMSBSize(const MCInst &MI, unsigned Idx,
86  const MCSubtargetInfo &STI) const;
87 
88  unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx,
90  const MCSubtargetInfo &STI) const {
91  const MCOperand &MO = MI.getOperand(Idx);
92  assert(MO.isImm() && "Unexpected MO type.");
93  return 1 << MO.getImm();
94  }
95 
96  MCFixupKind getTargetFixup(const MCExpr *Expr) const;
97 
98  template <llvm::CSKY::Fixups FIXUP>
99  unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx,
101  const MCSubtargetInfo &STI) const {
102  const MCOperand &MO = MI.getOperand(Idx);
103 
104  if (MO.isImm())
105  return MO.getImm() >> 1;
106 
107  assert(MO.isExpr() && "Unexpected MO type.");
108 
109  MCFixupKind Kind = MCFixupKind(FIXUP);
110  if (MO.getExpr()->getKind() == MCExpr::Target)
111  Kind = getTargetFixup(MO.getExpr());
112 
113  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
114  return 0;
115  }
116 
117  template <llvm::CSKY::Fixups FIXUP>
118  unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx,
120  const MCSubtargetInfo &STI) const {
121  const MCOperand &MO = MI.getOperand(Idx);
122  assert(MO.isExpr() && "Unexpected MO type.");
123 
124  MCFixupKind Kind = MCFixupKind(FIXUP);
125  if (MO.getExpr()->getKind() == MCExpr::Target)
126  Kind = getTargetFixup(MO.getExpr());
127 
128  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
129  return 0;
130  }
131 
132  template <llvm::CSKY::Fixups FIXUP>
133  unsigned getDataSymbolOpValue(const MCInst &MI, unsigned Idx,
135  const MCSubtargetInfo &STI) const {
136  const MCOperand &MO = MI.getOperand(Idx);
137  assert(MO.isExpr() && "Unexpected MO type.");
138 
139  MCFixupKind Kind = MCFixupKind(FIXUP);
140  if (MO.getExpr()->getKind() == MCExpr::Target)
141  Kind = getTargetFixup(MO.getExpr());
142 
143  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
144  return 0;
145  }
146 
147  unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx,
149  const MCSubtargetInfo &STI) const {
150  const MCOperand &MO = MI.getOperand(Idx);
151  assert(MO.isExpr() && "Unexpected MO type.");
152 
154  if (MO.getExpr()->getKind() == MCExpr::Target)
155  Kind = getTargetFixup(MO.getExpr());
156 
157  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
158  return 0;
159  }
160 
161  unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx,
163  const MCSubtargetInfo &STI) const {
164  const MCOperand &MO = MI.getOperand(Idx);
165  assert(MO.isExpr() && "Unexpected MO type.");
166 
168  if (MO.getExpr()->getKind() == MCExpr::Target)
169  Kind = getTargetFixup(MO.getExpr());
170 
171  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
172  return 0;
173  }
174 
175  void expandJBTF(const MCInst &MI, raw_ostream &OS,
177  const MCSubtargetInfo &STI) const;
178  void expandNEG(const MCInst &MI, raw_ostream &OS,
180  const MCSubtargetInfo &STI) const;
181  void expandRSUBI(const MCInst &MI, raw_ostream &OS,
183  const MCSubtargetInfo &STI) const;
184 };
185 
186 } // namespace llvm
187 
188 #endif // LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::CSKYMCCodeEmitter::expandJBTF
void expandJBTF(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:70
llvm::CSKYMCCodeEmitter::getBareSymbolOpValue
unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:161
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
MCCodeEmitter.h
llvm::MCFixup::create
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Definition: MCFixup.h:87
llvm::CSKYMCCodeEmitter::getBranchSymbolOpValue
unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:99
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::CSKYMCCodeEmitter::getBinaryCodeForInstr
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
llvm::MCExpr::Target
@ Target
Target specific expression.
Definition: MCExpr.h:42
MCContext.h
llvm::CSKYMCCodeEmitter::getDataSymbolOpValue
unsigned getDataSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:133
llvm::MCOperand::getImm
int64_t getImm() const
Definition: MCInst.h:80
llvm::CSKYMCCodeEmitter::getRegSeqImmOpValue
unsigned getRegSeqImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:259
llvm::AArch64::Fixups
Fixups
Definition: AArch64FixupKinds.h:17
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::CSKYMCCodeEmitter::~CSKYMCCodeEmitter
~CSKYMCCodeEmitter()
Definition: CSKYMCCodeEmitter.h:33
llvm::CSKYMCCodeEmitter::getOImmOpValue
unsigned getOImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:30
llvm::MCExpr::getKind
ExprKind getKind() const
Definition: MCExpr.h:81
llvm::CSKY::fixup_csky_pcrel_imm26_scale2
@ fixup_csky_pcrel_imm26_scale2
Definition: CSKYFixupKinds.h:27
llvm::CSKYMCCodeEmitter::getTargetFixup
MCFixupKind getTargetFixup(const MCExpr *Expr) const
Definition: CSKYMCCodeEmitter.cpp:303
llvm::MCOperand::isImm
bool isImm() const
Definition: MCInst.h:62
uint64_t
llvm::CSKYMCCodeEmitter::getImmOpValue
unsigned getImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:50
llvm::CSKYMCCodeEmitter::encodeInstruction
void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Definition: CSKYMCCodeEmitter.cpp:140
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::CSKYMCCodeEmitter
Definition: CSKYMCCodeEmitter.h:25
llvm::CSKYMCCodeEmitter::getImmJMPIX
unsigned getImmJMPIX(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:288
llvm::CSKYMCCodeEmitter::getRegisterSeqOpValue
unsigned getRegisterSeqOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:275
llvm::CSKYMCCodeEmitter::getImmShiftOpValue
unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:88
llvm::CSKY::fixup_csky_pcrel_imm18_scale2
@ fixup_csky_pcrel_imm18_scale2
Definition: CSKYFixupKinds.h:29
llvm::CSKYMCCodeEmitter::getImmOpValueIDLY
unsigned getImmOpValueIDLY(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:39
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
llvm::CSKYMCCodeEmitter::getConstpoolSymbolOpValue
unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:118
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::CSKYMCCodeEmitter::expandNEG
void expandNEG(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:96
llvm::CSKYMCCodeEmitter::CSKYMCCodeEmitter
CSKYMCCodeEmitter(MCContext &Ctx, const MCInstrInfo &MII)
Definition: CSKYMCCodeEmitter.h:30
llvm::MCOperand::getExpr
const MCExpr * getExpr() const
Definition: MCInst.h:114
CSKYFixupKinds.h
llvm::CSKYMCCodeEmitter::getCallSymbolOpValue
unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:147
llvm::CSKYMCCodeEmitter::expandRSUBI
void expandRSUBI(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:118
llvm::MCOperand::isExpr
bool isExpr() const
Definition: MCInst.h:65
llvm::CSKYMCCodeEmitter::getImmOpValueMSBSize
unsigned getImmOpValueMSBSize(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:50
CSKYMCExpr.h
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
shift
http eax xorl edx cl sete al setne dl sall eax sall edx But that requires good bit subreg support this might be better It s an extra shift
Definition: README.txt:30
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::CSKYMCCodeEmitter::getMachineOpValue
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:245
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35