LLVM  14.0.0git
CSKYMCCodeEmitter.h
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1 //===-- CSKYMCCodeEmitter.cpp - CSKY Code Emitter interface ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the CSKYMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
14 #define LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
15 
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCContext.h"
20 
21 namespace llvm {
22 
24  MCContext &Ctx;
25  const MCInstrInfo &MII;
26 
27 public:
29  : Ctx(Ctx), MII(MII) {}
30 
32 
33  void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
35  const MCSubtargetInfo &STI) const override;
36 
37  // Generated by tablegen.
40  const MCSubtargetInfo &STI) const;
41 
42  // Default encoding method used by tablegen.
43  unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
45  const MCSubtargetInfo &STI) const;
46 
47  template <int shift = 0>
48  unsigned getImmOpValue(const MCInst &MI, unsigned Idx,
50  const MCSubtargetInfo &STI) const {
51  const MCOperand &MO = MI.getOperand(Idx);
52  if (MO.isImm())
53  return (MO.getImm() >> shift);
54 
55  assert(MO.isExpr() && "Unexpected MO type.");
56 
58  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
59  return 0;
60  }
61 
62  unsigned getRegSeqImmOpValue(const MCInst &MI, unsigned Idx,
64  const MCSubtargetInfo &STI) const;
65 
66  unsigned getRegisterSeqOpValue(const MCInst &MI, unsigned Op,
68  const MCSubtargetInfo &STI) const;
69 
70  unsigned getOImmOpValue(const MCInst &MI, unsigned Idx,
72  const MCSubtargetInfo &STI) const;
73 
74  unsigned getImmOpValueIDLY(const MCInst &MI, unsigned Idx,
76  const MCSubtargetInfo &STI) const;
77 
78  unsigned getImmJMPIX(const MCInst &MI, unsigned Idx,
80  const MCSubtargetInfo &STI) const;
81 
82  unsigned getImmOpValueMSBSize(const MCInst &MI, unsigned Idx,
84  const MCSubtargetInfo &STI) const;
85 
86  unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx,
88  const MCSubtargetInfo &STI) const {
89  const MCOperand &MO = MI.getOperand(Idx);
90  assert(MO.isImm() && "Unexpected MO type.");
91  return 1 << MO.getImm();
92  }
93 
94  MCFixupKind getTargetFixup(const MCExpr *Expr) const;
95 
96  template <llvm::CSKY::Fixups FIXUP>
97  unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx,
99  const MCSubtargetInfo &STI) const {
100  const MCOperand &MO = MI.getOperand(Idx);
101 
102  if (MO.isImm())
103  return MO.getImm() >> 1;
104 
105  assert(MO.isExpr() && "Unexpected MO type.");
106 
107  MCFixupKind Kind = MCFixupKind(FIXUP);
108  if (MO.getExpr()->getKind() == MCExpr::Target)
109  Kind = getTargetFixup(MO.getExpr());
110 
111  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
112  return 0;
113  }
114 
115  template <llvm::CSKY::Fixups FIXUP>
116  unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx,
118  const MCSubtargetInfo &STI) const {
119  const MCOperand &MO = MI.getOperand(Idx);
120  assert(MO.isExpr() && "Unexpected MO type.");
121 
122  MCFixupKind Kind = MCFixupKind(FIXUP);
123  if (MO.getExpr()->getKind() == MCExpr::Target)
124  Kind = getTargetFixup(MO.getExpr());
125 
126  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
127  return 0;
128  }
129 
130  template <llvm::CSKY::Fixups FIXUP>
131  unsigned getDataSymbolOpValue(const MCInst &MI, unsigned Idx,
133  const MCSubtargetInfo &STI) const {
134  const MCOperand &MO = MI.getOperand(Idx);
135  assert(MO.isExpr() && "Unexpected MO type.");
136 
137  MCFixupKind Kind = MCFixupKind(FIXUP);
138  if (MO.getExpr()->getKind() == MCExpr::Target)
139  Kind = getTargetFixup(MO.getExpr());
140 
141  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
142  return 0;
143  }
144 
145  unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx,
147  const MCSubtargetInfo &STI) const {
148  const MCOperand &MO = MI.getOperand(Idx);
149  assert(MO.isExpr() && "Unexpected MO type.");
150 
152  if (MO.getExpr()->getKind() == MCExpr::Target)
153  Kind = getTargetFixup(MO.getExpr());
154 
155  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
156  return 0;
157  }
158 
159  unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx,
161  const MCSubtargetInfo &STI) const {
162  const MCOperand &MO = MI.getOperand(Idx);
163  assert(MO.isExpr() && "Unexpected MO type.");
164 
166  if (MO.getExpr()->getKind() == MCExpr::Target)
167  Kind = getTargetFixup(MO.getExpr());
168 
169  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
170  return 0;
171  }
172 };
173 
174 } // namespace llvm
175 
176 #endif // LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::CSKYMCCodeEmitter::getBareSymbolOpValue
unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:159
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
MCCodeEmitter.h
llvm::MCFixup::create
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Definition: MCFixup.h:87
llvm::CSKYMCCodeEmitter::getBranchSymbolOpValue
unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:97
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::CSKYMCCodeEmitter::getBinaryCodeForInstr
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
llvm::MCExpr::Target
@ Target
Target specific expression.
Definition: MCExpr.h:42
MCContext.h
llvm::CSKYMCCodeEmitter::getDataSymbolOpValue
unsigned getDataSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:131
llvm::MCOperand::getImm
int64_t getImm() const
Definition: MCInst.h:80
llvm::CSKYMCCodeEmitter::getRegSeqImmOpValue
unsigned getRegSeqImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:101
llvm::AArch64::Fixups
Fixups
Definition: AArch64FixupKinds.h:17
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::CSKYMCCodeEmitter::~CSKYMCCodeEmitter
~CSKYMCCodeEmitter()
Definition: CSKYMCCodeEmitter.h:31
llvm::CSKYMCCodeEmitter::getOImmOpValue
unsigned getOImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:27
llvm::MCExpr::getKind
ExprKind getKind() const
Definition: MCExpr.h:81
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::CSKY::fixup_csky_pcrel_imm26_scale2
@ fixup_csky_pcrel_imm26_scale2
Definition: CSKYFixupKinds.h:27
llvm::CSKYMCCodeEmitter::getTargetFixup
MCFixupKind getTargetFixup(const MCExpr *Expr) const
Definition: CSKYMCCodeEmitter.cpp:145
llvm::MCOperand::isImm
bool isImm() const
Definition: MCInst.h:62
uint64_t
llvm::CSKYMCCodeEmitter::getImmOpValue
unsigned getImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:48
llvm::CSKYMCCodeEmitter::encodeInstruction
void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Definition: CSKYMCCodeEmitter.cpp:67
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::CSKYMCCodeEmitter
Definition: CSKYMCCodeEmitter.h:23
llvm::CSKYMCCodeEmitter::getImmJMPIX
unsigned getImmJMPIX(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:130
llvm::CSKYMCCodeEmitter::getRegisterSeqOpValue
unsigned getRegisterSeqOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:117
llvm::CSKYMCCodeEmitter::getImmShiftOpValue
unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:86
llvm::CSKY::fixup_csky_pcrel_imm18_scale2
@ fixup_csky_pcrel_imm18_scale2
Definition: CSKYFixupKinds.h:29
llvm::CSKYMCCodeEmitter::getImmOpValueIDLY
unsigned getImmOpValueIDLY(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:36
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
llvm::CSKYMCCodeEmitter::getConstpoolSymbolOpValue
unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:116
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:325
llvm::CSKYMCCodeEmitter::CSKYMCCodeEmitter
CSKYMCCodeEmitter(MCContext &Ctx, const MCInstrInfo &MII)
Definition: CSKYMCCodeEmitter.h:28
llvm::MCOperand::getExpr
const MCExpr * getExpr() const
Definition: MCInst.h:114
CSKYFixupKinds.h
llvm::CSKYMCCodeEmitter::getCallSymbolOpValue
unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:145
llvm::MCOperand::isExpr
bool isExpr() const
Definition: MCInst.h:65
llvm::CSKYMCCodeEmitter::getImmOpValueMSBSize
unsigned getImmOpValueMSBSize(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:47
CSKYMCExpr.h
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
shift
http eax xorl edx cl sete al setne dl sall eax sall edx But that requires good bit subreg support this might be better It s an extra shift
Definition: README.txt:30
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::CSKYMCCodeEmitter::getMachineOpValue
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:87
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35