26#define DEBUG_TYPE "csky-mccode-emitter"
28STATISTIC(MCNumEmitted,
"Number of MC instructions emitted");
92 Fixups[Fixups.size() - 1].setOffset(2);
102 unsigned Size =
MI.getOpcode() == CSKY::NEG32 ? 4 : 2;
124 unsigned Size =
MI.getOpcode() == CSKY::RSUBI32 ? 4 : 2;
135 .
addImm(
MI.getOperand(2).getImm() + 1);
148 switch (
MI.getOpcode()) {
196 case CSKY::LRW32_Gen:
201 case CSKY::LRW16_Gen:
210 .
addImm(
MI.getOperand(2).getImm() + 1);
216 .
addImm(
MI.getOperand(2).getImm() + 1);
222 .
addImm(32 -
MI.getOperand(2).getImm());
225 auto V = 1 <<
MI.getOperand(1).getImm();
252 return static_cast<unsigned>(MO.
getImm());
262 assert(
MI.getOperand(
Idx).isReg() &&
"Unexpected MO type.");
263 assert(
MI.getOperand(
Idx + 1).isImm() &&
"Unexpected MO type.");
265 unsigned Ry =
MI.getOperand(
Idx).getReg();
266 unsigned Rz =
MI.getOperand(
Idx + 1).getImm();
283 unsigned Binary = ((Reg1 & 0x1f) << 5) | (Reg2 - Reg1);
291 if (
MI.getOperand(
Idx).getImm() == 16)
293 else if (
MI.getOperand(
Idx).getImm() == 24)
295 else if (
MI.getOperand(
Idx).getImm() == 32)
297 else if (
MI.getOperand(
Idx).getImm() == 40)
304 const CSKYMCExpr *CSKYExpr = cast<CSKYMCExpr>(Expr);
335#include "CSKYGenMCCodeEmitter.inc"
static void writeData(uint32_t Bin, unsigned Size, raw_ostream &OS)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
unsigned getRegisterSeqOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getOImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void expandJBTF(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getImmOpValueMSBSize(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void expandRSUBI(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MCFixupKind getTargetFixup(const MCExpr *Expr) const
unsigned getRegSeqImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getImmOpValueIDLY(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getImmJMPIX(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void expandNEG(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
VariantKind getKind() const
MCCodeEmitter - Generic instruction encoding interface.
Context object for machine code objects.
const MCRegisterInfo * getRegisterInfo() const
Base class for the full range of assembler expressions which are needed for parsing.
MCInstBuilder & addOperand(const MCOperand &Op)
Add an operand.
MCInstBuilder & addImm(int64_t Val)
Add a new integer immediate operand.
Instances of this class represent a single low-level machine instruction.
Describe properties that are true of each instruction in the target description file.
unsigned getSize() const
Return the number of bytes in the encoding of this instruction, or zero if the encoding size cannot b...
Interface to description of machine instruction set.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Instances of this class represent operands of the MCInst class.
unsigned getReg() const
Returns the register number.
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_csky_plt_imm18_scale4
@ fixup_csky_got_imm18_scale4
This is an optimization pass for GlobalISel generic memory operations.
MCFixupKind
Extensible enumeration to represent the type of a fixup.
MCCodeEmitter * createCSKYMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)