LLVM  14.0.0git
VEMCTargetDesc.h
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1 //===-- VEMCTargetDesc.h - VE Target Descriptions ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides VE specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
14 #define LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
15 
16 #include "llvm/Support/DataTypes.h"
17 
18 #include <memory>
19 
20 namespace llvm {
21 class MCAsmBackend;
22 class MCCodeEmitter;
23 class MCContext;
24 class MCInstrInfo;
25 class MCObjectTargetWriter;
26 class MCRegisterInfo;
27 class MCSubtargetInfo;
28 class MCTargetOptions;
29 class Target;
30 class Triple;
31 class StringRef;
32 class raw_pwrite_stream;
33 class raw_ostream;
34 
35 MCCodeEmitter *createVEMCCodeEmitter(const MCInstrInfo &MCII,
36  const MCRegisterInfo &MRI, MCContext &Ctx);
37 MCAsmBackend *createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI,
38  const MCRegisterInfo &MRI,
39  const MCTargetOptions &Options);
40 std::unique_ptr<MCObjectTargetWriter> createVEELFObjectWriter(uint8_t OSABI);
41 } // namespace llvm
42 
43 // Defines symbolic names for VE registers. This defines a mapping from
44 // register name to register number.
45 //
46 #define GET_REGINFO_ENUM
47 #include "VEGenRegisterInfo.inc"
48 
49 // Defines symbolic names for the VE instructions.
50 //
51 #define GET_INSTRINFO_ENUM
52 #include "VEGenInstrInfo.inc"
53 
54 #define GET_SUBTARGETINFO_ENUM
55 #include "VEGenSubtargetInfo.inc"
56 
57 #endif
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::createVEELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createVEELFObjectWriter(uint8_t OSABI)
Definition: VEELFObjectWriter.cpp:133
llvm::AMDGPU::Exp::Target
Target
Definition: SIDefines.h:742
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::createVEAsmBackend
MCAsmBackend * createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: VEAsmBackend.cpp:220
llvm::createVEMCCodeEmitter
MCCodeEmitter * createVEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Definition: VEMCCodeEmitter.cpp:161
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
DataTypes.h