LLVM 19.0.0git
VEAsmBackend.cpp
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1//===-- VEAsmBackend.cpp - VE Assembler Backend ---------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
13#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCValue.h"
20
21using namespace llvm;
22
23static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
24 switch (Kind) {
25 default:
26 llvm_unreachable("Unknown fixup kind!");
27 case FK_Data_1:
28 case FK_Data_2:
29 case FK_Data_4:
30 case FK_Data_8:
31 case FK_PCRel_1:
32 case FK_PCRel_2:
33 case FK_PCRel_4:
34 case FK_PCRel_8:
35 return Value;
43 return (Value >> 32) & 0xffffffff;
53 return Value & 0xffffffff;
54 }
55}
56
57/// getFixupKindNumBytes - The number of bytes the fixup may change.
58static unsigned getFixupKindNumBytes(unsigned Kind) {
59 switch (Kind) {
60 default:
61 llvm_unreachable("Unknown fixup kind!");
62 case FK_Data_1:
63 case FK_PCRel_1:
64 return 1;
65 case FK_Data_2:
66 case FK_PCRel_2:
67 return 2;
68 return 4;
69 case FK_Data_4:
70 case FK_PCRel_4:
87 return 4;
88 case FK_Data_8:
89 case FK_PCRel_8:
90 return 8;
91 }
92}
93
94namespace {
95class VEAsmBackend : public MCAsmBackend {
96protected:
97 const Target &TheTarget;
98
99public:
100 VEAsmBackend(const Target &T)
101 : MCAsmBackend(llvm::endianness::little), TheTarget(T) {}
102
103 unsigned getNumFixupKinds() const override { return VE::NumTargetFixupKinds; }
104
105 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
106 const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = {
107 // name, offset, bits, flags
108 {"fixup_ve_reflong", 0, 32, 0},
109 {"fixup_ve_srel32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
110 {"fixup_ve_hi32", 0, 32, 0},
111 {"fixup_ve_lo32", 0, 32, 0},
112 {"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
113 {"fixup_ve_pc_lo32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
114 {"fixup_ve_got_hi32", 0, 32, 0},
115 {"fixup_ve_got_lo32", 0, 32, 0},
116 {"fixup_ve_gotoff_hi32", 0, 32, 0},
117 {"fixup_ve_gotoff_lo32", 0, 32, 0},
118 {"fixup_ve_plt_hi32", 0, 32, 0},
119 {"fixup_ve_plt_lo32", 0, 32, 0},
120 {"fixup_ve_tls_gd_hi32", 0, 32, 0},
121 {"fixup_ve_tls_gd_lo32", 0, 32, 0},
122 {"fixup_ve_tpoff_hi32", 0, 32, 0},
123 {"fixup_ve_tpoff_lo32", 0, 32, 0},
124 };
125
126 if (Kind < FirstTargetFixupKind)
128
129 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
130 "Invalid kind!");
131 return Infos[Kind - FirstTargetFixupKind];
132 }
133
134 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
135 const MCValue &Target,
136 const MCSubtargetInfo *STI) override {
137 switch ((VE::Fixups)Fixup.getKind()) {
138 default:
139 return false;
144 return true;
145 }
146 }
147
148 bool mayNeedRelaxation(const MCInst &Inst,
149 const MCSubtargetInfo &STI) const override {
150 // Not implemented yet. For example, if we have a branch with
151 // lager than SIMM32 immediate value, we want to relaxation such
152 // branch instructions.
153 return false;
154 }
155
156 /// fixupNeedsRelaxation - Target specific predicate for whether a given
157 /// fixup requires the associated instruction to be relaxed.
159 const MCRelaxableFragment *DF,
160 const MCAsmLayout &Layout) const override {
161 // Not implemented yet. For example, if we have a branch with
162 // lager than SIMM32 immediate value, we want to relaxation such
163 // branch instructions.
164 return false;
165 }
166 void relaxInstruction(MCInst &Inst,
167 const MCSubtargetInfo &STI) const override {
168 // Aurora VE doesn't support relaxInstruction yet.
169 llvm_unreachable("relaxInstruction() should not be called");
170 }
171
172 bool writeNopData(raw_ostream &OS, uint64_t Count,
173 const MCSubtargetInfo *STI) const override {
174 if ((Count % 8) != 0)
175 return false;
176
177 for (uint64_t i = 0; i < Count; i += 8)
178 support::endian::write<uint64_t>(OS, 0x7900000000000000ULL,
180
181 return true;
182 }
183};
184
185class ELFVEAsmBackend : public VEAsmBackend {
186 Triple::OSType OSType;
187
188public:
189 ELFVEAsmBackend(const Target &T, Triple::OSType OSType)
190 : VEAsmBackend(T), OSType(OSType) {}
191
192 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
194 uint64_t Value, bool IsResolved,
195 const MCSubtargetInfo *STI) const override {
196 Value = adjustFixupValue(Fixup.getKind(), Value);
197 if (!Value)
198 return; // Doesn't change encoding.
199
200 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
201
202 // Shift the value into position.
203 Value <<= Info.TargetOffset;
204
205 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
206 unsigned Offset = Fixup.getOffset();
207 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
208 // For each byte of the fragment that the fixup touches, mask in the bits
209 // from the fixup value. The Value has been "split up" into the
210 // appropriate bitfields above.
211 for (unsigned i = 0; i != NumBytes; ++i) {
212 unsigned Idx =
213 Endian == llvm::endianness::little ? i : (NumBytes - 1) - i;
214 Data[Offset + Idx] |= static_cast<uint8_t>((Value >> (i * 8)) & 0xff);
215 }
216 }
217
218 std::unique_ptr<MCObjectTargetWriter>
219 createObjectTargetWriter() const override {
220 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
221 return createVEELFObjectWriter(OSABI);
222 }
223};
224} // end anonymous namespace
225
227 const MCSubtargetInfo &STI,
228 const MCRegisterInfo &MRI,
229 const MCTargetOptions &Options) {
230 return new ELFVEAsmBackend(T, STI.getTargetTriple().getOS());
231}
unsigned const MachineRegisterInfo * MRI
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
static LVOptions Options
Definition: LVOptions.cpp:25
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
endianness Endian
raw_pwrite_stream & OS
static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value)
static unsigned getFixupKindNumBytes(unsigned Kind)
getFixupKindNumBytes - The number of bytes the fixup may change.
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:43
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const
Relax the instruction in the given fragment to the next wider instruction.
Definition: MCAsmBackend.h:186
virtual bool mayNeedRelaxation(const MCInst &Inst, const MCSubtargetInfo &STI) const
Check whether the given instruction may need relaxation.
Definition: MCAsmBackend.h:163
virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const =0
Simple predicate for targets where !Resolved implies requiring relaxation.
virtual bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const MCSubtargetInfo *STI)
Hook to check if a relocation is needed for some target specific reason.
Definition: MCAsmBackend.h:102
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:267
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
This represents an "assembler immediate".
Definition: MCValue.h:36
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
Target - Wrapper for Target specific information.
OSType getOS() const
Get the parsed operating system type of this triple.
Definition: Triple.h:382
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_ve_tpoff_hi32
Definition: VEFixupKinds.h:54
@ fixup_ve_srel32
fixup_ve_srel32 - 32-bit fixup corresponding to foo for relative branch
Definition: VEFixupKinds.h:21
@ fixup_ve_plt_lo32
Definition: VEFixupKinds.h:49
@ fixup_ve_got_hi32
fixup_ve_got_hi32 - 32-bit fixup corresponding to foo@got_hi
Definition: VEFixupKinds.h:36
@ fixup_ve_gotoff_hi32
fixup_ve_gotoff_hi32 - 32-bit fixup corresponding to foo@gotoff_hi
Definition: VEFixupKinds.h:42
@ fixup_ve_got_lo32
fixup_ve_got_lo32 - 32-bit fixup corresponding to foo@got_lo
Definition: VEFixupKinds.h:39
@ fixup_ve_pc_hi32
fixup_ve_pc_hi32 - 32-bit fixup corresponding to foo@pc_hi
Definition: VEFixupKinds.h:30
@ fixup_ve_lo32
fixup_ve_lo32 - 32-bit fixup corresponding to foo@lo
Definition: VEFixupKinds.h:27
@ fixup_ve_gotoff_lo32
fixup_ve_gotoff_lo32 - 32-bit fixup corresponding to foo@gotoff_lo
Definition: VEFixupKinds.h:45
@ NumTargetFixupKinds
Definition: VEFixupKinds.h:59
@ fixup_ve_hi32
fixup_ve_hi32 - 32-bit fixup corresponding to foo@hi
Definition: VEFixupKinds.h:24
@ fixup_ve_pc_lo32
fixup_ve_pc_lo32 - 32-bit fixup corresponding to foo@pc_lo
Definition: VEFixupKinds.h:33
@ fixup_ve_tpoff_lo32
Definition: VEFixupKinds.h:55
@ fixup_ve_plt_hi32
fixup_ve_plt_hi32/lo32
Definition: VEFixupKinds.h:48
@ fixup_ve_reflong
fixup_ve_reflong - 32-bit fixup corresponding to foo
Definition: VEFixupKinds.h:18
@ fixup_ve_tls_gd_lo32
Definition: VEFixupKinds.h:53
@ fixup_ve_tls_gd_hi32
fixups for Thread Local Storage
Definition: VEFixupKinds.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FirstTargetFixupKind
Definition: MCFixup.h:45
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:30
@ FK_PCRel_2
A two-byte pc relative fixup.
Definition: MCFixup.h:29
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
@ FK_Data_1
A one-byte fixup.
Definition: MCFixup.h:23
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
@ FK_PCRel_8
A eight-byte pc relative fixup.
Definition: MCFixup.h:31
@ FK_PCRel_1
A one-byte pc relative fixup.
Definition: MCFixup.h:28
@ FK_Data_2
A two-byte fixup.
Definition: MCFixup.h:24
MCAsmBackend * createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
endianness
Definition: bit.h:70
std::unique_ptr< MCObjectTargetWriter > createVEELFObjectWriter(uint8_t OSABI)
Target independent information on a fixup kind.
@ FKF_IsPCRel
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...