35#define DEBUG_TYPE "mccodeemitter"
37STATISTIC(MCNumEmitted,
"Number of MC instructions emitted");
47 VEMCCodeEmitter(
const VEMCCodeEmitter &) =
delete;
48 VEMCCodeEmitter &
operator=(
const VEMCCodeEmitter &) =
delete;
49 ~VEMCCodeEmitter()
override =
default;
89unsigned VEMCCodeEmitter::getMachineOpValue(
const MCInst &
MI,
94 return Ctx.getRegisterInfo()->getEncodingValue(MO.
getReg());
96 return static_cast<unsigned>(MO.
getImm());
101 if (
const VEMCExpr *SExpr = dyn_cast<VEMCExpr>(Expr)) {
108 if (Expr->evaluateAsAbsolute(Res))
116VEMCCodeEmitter::getBranchTargetOpValue(
const MCInst &
MI,
unsigned OpNo,
121 return getMachineOpValue(
MI, MO, Fixups, STI);
144 getMachineOpValue(
MI, MO, Fixups, STI)));
148#include "VEGenMCCodeEmitter.inc"
152 return new VEMCCodeEmitter(MCII, Ctx);
static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, unsigned FixupKind, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI)
getBranchTargetOpValue - Helper function to get the branch target operand, which is either an immedia...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
MCCodeEmitter - Generic instruction encoding interface.
virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
MCCodeEmitter & operator=(const MCCodeEmitter &)=delete
Context object for machine code objects.
Base class for the full range of assembler expressions which are needed for parsing.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Instances of this class represent a single low-level machine instruction.
Interface to description of machine instruction set.
Instances of this class represent operands of the MCInst class.
unsigned getReg() const
Returns the register number.
const MCExpr * getExpr() const
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_ve_srel32
fixup_ve_srel32 - 32-bit fixup corresponding to foo for relative branch
This is an optimization pass for GlobalISel generic memory operations.
static unsigned VECondCodeToVal(VECC::CondCode CC)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
static unsigned VERDToVal(VERD::RoundingMode R)
MCCodeEmitter * createVEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)