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    LLVM 22.0.0git
    
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Abstract base interface for LS (load/store) units in llvm-mca. More...
#include "llvm/MCA/HardwareUnits/LSUnit.h"
Public Types | |
| enum | Status { LSU_AVAILABLE = 0 , LSU_LQUEUE_FULL , LSU_SQUEUE_FULL } | 
Public Member Functions | |
| LSUnitBase (const MCSchedModel &SM, unsigned LoadQueueSize, unsigned StoreQueueSize, bool AssumeNoAlias) | |
| ~LSUnitBase () override | |
| unsigned | getLoadQueueSize () const | 
| Returns the total number of entries in the load queue.   | |
| unsigned | getStoreQueueSize () const | 
| Returns the total number of entries in the store queue.   | |
| unsigned | getUsedLQEntries () const | 
| unsigned | getUsedSQEntries () const | 
| void | acquireLQSlot () | 
| void | acquireSQSlot () | 
| void | releaseLQSlot () | 
| void | releaseSQSlot () | 
| bool | assumeNoAlias () const | 
| virtual Status | isAvailable (const InstRef &IR) const =0 | 
| This method checks the availability of the load/store buffers.   | |
| virtual unsigned | dispatch (const InstRef &IR)=0 | 
| Allocates LS resources for instruction IR.   | |
| bool | isSQEmpty () const | 
| bool | isLQEmpty () const | 
| bool | isSQFull () const | 
| bool | isLQFull () const | 
| virtual bool | isReady (const InstRef &IR) const =0 | 
| Check if a peviously dispatched instruction IR is now ready for execution.   | |
| virtual bool | isPending (const InstRef &IR) const =0 | 
| Check if instruction IR only depends on memory instructions that are currently executing.   | |
| virtual bool | isWaiting (const InstRef &IR) const =0 | 
| Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.   | |
| virtual bool | hasDependentUsers (const InstRef &IR) const =0 | 
| virtual const CriticalDependency | getCriticalPredecessor (unsigned GroupId)=0 | 
| virtual void | onInstructionExecuted (const InstRef &IR)=0 | 
| virtual void | onInstructionRetired (const InstRef &IR)=0 | 
| virtual void | onInstructionIssued (const InstRef &IR)=0 | 
| virtual void | cycleEvent ()=0 | 
| virtual void | dump () const =0 | 
| Public Member Functions inherited from llvm::mca::HardwareUnit | |
| HardwareUnit ()=default | |
| virtual | ~HardwareUnit () | 
Abstract base interface for LS (load/store) units in llvm-mca.
| llvm::mca::LSUnitBase::LSUnitBase | ( | const MCSchedModel & | SM, | 
| unsigned | LoadQueueSize, | ||
| unsigned | StoreQueueSize, | ||
| bool | AssumeNoAlias ) | 
Definition at line 24 of file LSUnit.cpp.
References llvm::MCSchedModel::hasExtraProcessorInfo(), and if().
Referenced by llvm::mca::LSUnit::LSUnit().
      
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  overridedefault | 
      
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  inline | 
Definition at line 70 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
      
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  inline | 
Definition at line 71 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
      
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  inline | 
Definition at line 75 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
      
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  pure virtual | 
Implemented in llvm::mca::LSUnit.
Allocates LS resources for instruction IR.
This method assumes that a previous call to isAvailable(IR) succeeded with a LSUnitBase::Status value of LSU_AVAILABLE. Returns the GroupID associated with this instruction. That value will be used to set the LSUTokenID field in class Instruction.
Implemented in llvm::mca::LSUnit.
References IR.
      
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  pure virtual | 
Implemented in llvm::mca::LSUnit.
      
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  pure virtual | 
Implemented in llvm::mca::LSUnit.
      
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  inline | 
Returns the total number of entries in the load queue.
Definition at line 63 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dump().
      
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  inline | 
Returns the total number of entries in the store queue.
Definition at line 66 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dump().
      
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  inline | 
Definition at line 68 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dump().
      
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  inline | 
Definition at line 69 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dump().
Implemented in llvm::mca::LSUnit.
References IR.
This method checks the availability of the load/store buffers.
Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is not a memory operation.
Implemented in llvm::mca::LSUnit.
References IR.
      
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  inline | 
Definition at line 101 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::isAvailable().
Check if instruction IR only depends on memory instructions that are currently executing.
Implemented in llvm::mca::LSUnit.
References IR.
Check if a peviously dispatched instruction IR is now ready for execution.
Implemented in llvm::mca::LSUnit.
References IR.
      
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  inline | 
Definition at line 100 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::isAvailable().
Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.
Implemented in llvm::mca::LSUnit.
References IR.
Implemented in llvm::mca::LSUnit.
References IR.
Implemented in llvm::mca::LSUnit.
References IR.
Implemented in llvm::mca::LSUnit.
References IR.
      
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  inline | 
Definition at line 72 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::onInstructionRetired().
      
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  inline | 
Definition at line 73 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::onInstructionRetired().