LLVM 24.0.0git
NVPTXSubtarget.cpp
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1//===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the NVPTX specific subclass of TargetSubtarget.
10//
11//===----------------------------------------------------------------------===//
12
13#include "NVPTXSubtarget.h"
15#include "NVPTXTargetMachine.h"
18
19using namespace llvm;
20
21#define DEBUG_TYPE "nvptx-subtarget"
22
23#define GET_SUBTARGETINFO_TARGET_DESC
24#define GET_SUBTARGETINFO_CTOR
25#include "NVPTXGenSubtargetInfo.inc"
26
27static cl::opt<bool>
28 NoF16Math("nvptx-no-f16-math", cl::Hidden,
29 cl::desc("NVPTX Specific: Disable generation of f16 math ops."),
30 cl::init(false));
31
32static cl::opt<bool> NoF32x2("nvptx-no-f32x2", cl::Hidden,
33 cl::desc("NVPTX Specific: Disable generation of "
34 "f32x2 instructions and registers."),
35 cl::init(false));
36
37// Pin the vtable to this file.
38void NVPTXSubtarget::anchor() {}
39
40// Returns the minimum PTX version required for a given SM target.
41// This must be kept in sync with the "Supported Targets" column of the
42// "PTX Release History" table in the PTX ISA documentation:
43// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#release-notes-ptx-release-history
44//
45// Note: LLVM's minimum supported PTX version is 3.2 (see FeaturePTX in
46// NVPTX.td), so older SMs that supported earlier PTX versions instead use 3.2
47// as their effective minimum.
48static unsigned minPTXVersion(NVPTX::GPUKind Arch) {
49 switch (Arch) {
50 case NVPTX::GK_NONE:
51 llvm_unreachable("architecture is resolved before this is reached");
52 case NVPTX::GK_SM_20:
53 case NVPTX::GK_SM_21:
54 case NVPTX::GK_SM_30:
55 case NVPTX::GK_SM_35:
56 return 32;
57 case NVPTX::GK_SM_32_:
58 case NVPTX::GK_SM_50:
59 return 40;
60 case NVPTX::GK_SM_37:
61 case NVPTX::GK_SM_52:
62 return 41;
63 case NVPTX::GK_SM_53:
64 return 42;
65 case NVPTX::GK_SM_60:
66 case NVPTX::GK_SM_61:
67 case NVPTX::GK_SM_62:
68 return 50;
69 case NVPTX::GK_SM_70:
70 return 60;
71 case NVPTX::GK_SM_72:
72 return 61;
73 case NVPTX::GK_SM_75:
74 return 63;
75 case NVPTX::GK_SM_80:
76 return 70;
77 case NVPTX::GK_SM_86:
78 return 71;
79 case NVPTX::GK_SM_87:
80 return 74;
81 case NVPTX::GK_SM_89:
82 case NVPTX::GK_SM_90:
83 return 78;
84 case NVPTX::GK_SM_90a:
85 return 80;
86 case NVPTX::GK_SM_100:
87 case NVPTX::GK_SM_100a:
88 case NVPTX::GK_SM_101:
89 case NVPTX::GK_SM_101a:
90 return 86;
91 case NVPTX::GK_SM_120:
92 case NVPTX::GK_SM_120a:
93 return 87;
94 case NVPTX::GK_SM_100f:
95 case NVPTX::GK_SM_101f:
96 case NVPTX::GK_SM_103:
97 case NVPTX::GK_SM_103f:
98 case NVPTX::GK_SM_103a:
99 case NVPTX::GK_SM_120f:
100 case NVPTX::GK_SM_121:
101 case NVPTX::GK_SM_121f:
102 case NVPTX::GK_SM_121a:
103 return 88;
104 case NVPTX::GK_SM_88:
105 case NVPTX::GK_SM_110:
106 case NVPTX::GK_SM_110f:
107 case NVPTX::GK_SM_110a:
108 return 90;
109 case NVPTX::GK_SM_107:
110 case NVPTX::GK_SM_107f:
111 case NVPTX::GK_SM_107a:
112 return 94;
113 }
114 llvm_unreachable("invalid NVPTX GPUKind");
115}
116
118 StringRef FS) {
119 // If the user did not provide a target we default to the `sm_75` target.
120 StringRef RequestedCPU = CPU.empty() ? StringRef("sm_75") : CPU;
121 ParseSubtargetFeatures(RequestedCPU, /*TuneCPU=*/RequestedCPU, FS);
122
123 Arch = NVPTX::parseArch(RequestedCPU);
124
125 // An unrecognized name has already been diagnosed and its features dropped,
126 // leaving the subtarget at the oldest architecture, so name it that.
127 if (Arch == NVPTX::GK_NONE)
128 Arch = NVPTX::GK_SM_20;
129
130 unsigned MinPTX = minPTXVersion(Arch);
131
132 if (PTXVersion == 0) {
133 // User didn't request a specific PTX version; use the minimum for this SM.
134 PTXVersion = MinPTX;
135 } else if (PTXVersion < MinPTX) {
136 // User explicitly requested an insufficient PTX version.
138 formatv("PTX version {0}.{1} does not support target '{2}'. "
139 "Minimum required PTX version is {3}.{4}. "
140 "Either remove the PTX version to use the default, "
141 "or increase it to at least {3}.{4}.",
142 PTXVersion / 10, PTXVersion % 10, RequestedCPU, MinPTX / 10,
143 MinPTX % 10));
144 }
145
146 return *this;
147}
148
150 const NVPTXTargetMachine &TM)
151 : NVPTXGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), PTXVersion(0),
152 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
153 TSInfo(std::make_unique<NVPTXSelectionDAGInfo>()) {}
154
156
158 return hasFP16Math() && NoF16Math == false;
159}
160
162 return hasFeature(NVPTX::SM100) && PTXVersion >= 86 && !NoF32x2;
163}
164
165bool NVPTXSubtarget::hasNativeBF16Support(unsigned Opcode) const {
166 if (!hasBF16Math())
167 return false;
168
169 switch (Opcode) {
170 // Several BF16 instructions are available on sm_90 only.
171 case ISD::FADD:
172 case ISD::FMUL:
173 case ISD::FSUB:
174 case ISD::SELECT:
175 case ISD::SELECT_CC:
176 case ISD::SETCC:
177 case ISD::FEXP2:
178 case ISD::FTANH:
179 case ISD::FCEIL:
180 case ISD::FFLOOR:
181 case ISD::FNEARBYINT:
182 case ISD::FRINT:
183 case ISD::FROUNDEVEN:
184 case ISD::FTRUNC:
185 return hasFeature(NVPTX::SM90) && getPTXVersion() >= 78;
186 // Several BF16 instructions are available on sm_80 only.
187 case ISD::FMINNUM:
188 case ISD::FMAXNUM:
191 case ISD::FMAXIMUM:
192 case ISD::FMINIMUM:
193 return hasFeature(NVPTX::SM80) && getPTXVersion() >= 70;
194 }
195 return true;
196}
static bool hasFeature(StringRef Feature, const FeatureBitset &FeatureBits, ArrayRef< SubtargetFeatureKV > ProcFeatures)
static cl::opt< bool > NoF32x2("nvptx-no-f32x2", cl::Hidden, cl::desc("NVPTX Specific: Disable generation of " "f32x2 instructions and registers."), cl::init(false))
static unsigned minPTXVersion(NVPTX::GPUKind Arch)
static cl::opt< bool > NoF16Math("nvptx-no-f16-math", cl::Hidden, cl::desc("NVPTX Specific: Disable generation of f16 math ops."), cl::init(false))
bool hasNativeBF16Support(unsigned Opcode) const
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
unsigned getPTXVersion() const
~NVPTXSubtarget() override
bool hasF32x2Instructions() const
NVPTXSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
NVPTXSubtarget(const Triple &TT, StringRef CPU, StringRef FS, const NVPTXTargetMachine &TM)
This constructor initializes the data members to match that of the specified module.
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
constexpr bool empty() const
Check if the string is empty.
Definition StringRef.h:141
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:829
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:806
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:821
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
LLVM_ABI GPUKind parseArch(StringRef CPU)
Parse CPU (e.g. "sm_90") into a GPUKind, or GK_NONE if unrecognized.
GPUKind
GPU kinds supported by the NVPTX target.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
auto formatv(bool Validate, const char *Fmt, Ts &&...Vals)
LLVM_ABI void reportFatalUsageError(Error Err)
Report a fatal error that does not indicate a bug in LLVM.
Definition Error.cpp:177
Implement std::hash so that hash_code can be used in STL containers.
Definition BitVector.h:878