25#define DEBUG_TYPE "instcombine"
29 cl::desc(
"Verify that computeKnownBits() and "
30 "SimplifyDemandedBits() are consistent"),
34 "instcombine-simplify-vector-elts-depth",
36 "Depth limit when simplifying vector instructions and their operands"),
43 const APInt &Demanded) {
45 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
54 if (
C->isSubsetOf(Demanded))
58 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
66 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
69 return DL.getPointerTypeSizeInBits(Ty);
78 SQ.getWithInstruction(&Inst));
80 if (V == &Inst)
return true;
96 const APInt &DemandedMask,
100 Use &U =
I->getOperandUse(OpNo);
108 if (DemandedMask.
isZero()) {
133 if (!NewVal)
return false;
165 const APInt &DemandedMask,
169 assert(
I !=
nullptr &&
"Null pointer of Value???");
172 Type *VTy =
I->getType();
176 "Value *V, DemandedMask and Known must have same BitWidth");
182 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
188 I->setHasNoSignedWrap(
false);
189 I->setHasNoUnsignedWrap(
false);
196 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
205 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
211 switch (
I->getOpcode()) {
215 case Instruction::And: {
233 return I->getOperand(0);
235 return I->getOperand(1);
243 case Instruction::Or: {
249 I->dropPoisonGeneratingFlags();
264 return I->getOperand(0);
266 return I->getOperand(1);
275 RHSCache(
I->getOperand(1), RHSKnown);
284 case Instruction::Xor: {
289 if (DemandedMask == 1 &&
296 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
310 return I->getOperand(0);
312 return I->getOperand(1);
319 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
333 ~RHSKnown.
One & DemandedMask);
343 if ((*
C | ~DemandedMask).isAllOnes()) {
359 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
362 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
363 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
366 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
370 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
376 case Instruction::Select: {
386 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
387 const APInt &DemandedMask) {
407 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
408 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
413 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
414 CanonicalizeSelectConstant(
I, 2, DemandedMask))
425 case Instruction::Trunc: {
439 return Builder.CreateLShr(Trunc,
C->getZExtValue());
444 case Instruction::ZExt: {
445 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
453 I->dropPoisonGeneratingFlags();
457 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
464 case Instruction::SExt: {
466 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
468 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
473 InputDemandedBits.
setBit(SrcBitWidth-1);
494 case Instruction::Add: {
495 if ((DemandedMask & 1) == 0) {
501 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
511 return Builder.CreateSExt(AndNot, VTy);
516 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
517 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
538 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
544 APInt DemandedFromLHS = DemandedFromOps;
548 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
553 return I->getOperand(0);
554 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
555 return I->getOperand(1);
564 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
574 case Instruction::Sub: {
581 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
587 APInt DemandedFromLHS = DemandedFromOps;
591 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
596 return I->getOperand(0);
599 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
600 return I->getOperand(1);
608 return Builder.CreateNot(
I->getOperand(1));
617 case Instruction::Mul: {
618 APInt DemandedFromOps;
619 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
629 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
630 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
637 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
638 Constant *One = ConstantInt::get(VTy, 1);
639 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
646 case Instruction::Shl: {
653 DemandedMask, Known))
657 if (
I->hasOneUse()) {
659 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
661 auto [IID, FShiftArgs] = *Opt;
662 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
663 FShiftArgs[0] == FShiftArgs[1]) {
675 if (
I->hasNoSignedWrap()) {
679 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
680 return I->getOperand(0);
690 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
694 LeftShiftAmtC,
DL) ==
C) {
695 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
701 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
725 I->dropPoisonGeneratingFlags();
733 case Instruction::LShr: {
739 if (
I->hasOneUse()) {
741 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
743 auto [IID, FShiftArgs] = *Opt;
744 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
745 FShiftArgs[0] == FShiftArgs[1]) {
761 if (SignBits >= NumHiDemandedBits)
762 return I->getOperand(0);
771 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
775 RightShiftAmtC,
DL) ==
C) {
782 if (
match(
I->getOperand(0),
786 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
792 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
795 I->dropPoisonGeneratingFlags();
806 case Instruction::AShr: {
812 if (SignBits >= NumHiDemandedBits)
813 return I->getOperand(0);
819 if (DemandedMask.
isOne()) {
822 I->getOperand(0),
I->getOperand(1),
I->getName());
831 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
834 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
835 if (ShiftedInBitsDemanded)
839 I->dropPoisonGeneratingFlags();
845 if (Known.
Zero[
BitWidth - 1] || !ShiftedInBitsDemanded) {
855 ShiftAmt != 0,
I->isExact());
861 case Instruction::UDiv: {
867 APInt DemandedMaskIn =
872 I->dropPoisonGeneratingFlags();
883 case Instruction::SRem: {
886 if (DemandedMask.
ult(*Rem))
887 return I->getOperand(0);
889 APInt LowBits = *Rem - 1;
900 case Instruction::Call: {
901 bool KnownBitsComputed =
false;
903 switch (
II->getIntrinsicID()) {
904 case Intrinsic::abs: {
905 if (DemandedMask == 1)
906 return II->getArgOperand(0);
909 case Intrinsic::ctpop: {
917 II->getModule(), Intrinsic::ctpop, VTy);
922 case Intrinsic::bswap: {
939 NewVal = BinaryOperator::CreateLShr(
940 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
942 NewVal = BinaryOperator::CreateShl(
943 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
949 case Intrinsic::ptrmask: {
950 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
955 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
956 RHSKnown, Q,
Depth + 1))
962 Known = LHSKnown & RHSKnown;
963 KnownBitsComputed =
true;
978 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
979 return I->getOperand(0);
983 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
998 if (!LHSKnown.isZero()) {
999 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1002 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1004 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1006 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1008 if (MaskedGEPIndex != GEPIndex) {
1011 Type *GEPIndexType =
1012 DL.getIndexType(
GEP->getPointerOperand()->getType());
1014 GEP->getSourceElementType(), InnerPtr,
1015 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1016 GEP->getName(),
GEP->isInBounds());
1027 case Intrinsic::fshr:
1028 case Intrinsic::fshl: {
1036 if (
II->getIntrinsicID() == Intrinsic::fshr)
1039 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1041 if (
I->getOperand(0) !=
I->getOperand(1)) {
1047 I->dropPoisonGeneratingReturnAttributes();
1054 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1068 LHSKnown <<= ShiftAmt;
1071 KnownBitsComputed =
true;
1074 case Intrinsic::umax: {
1081 CTZ >=
C->getActiveBits())
1082 return II->getArgOperand(0);
1085 case Intrinsic::umin: {
1093 CTZ >=
C->getBitWidth() -
C->countl_one())
1094 return II->getArgOperand(0);
1100 *
II, DemandedMask, Known, KnownBitsComputed);
1108 if (!KnownBitsComputed)
1114 if (
I->getType()->isPointerTy()) {
1115 Align Alignment =
I->getPointerAlignment(
DL);
1123 if (!
I->getType()->isPointerTy() &&
1129 if (Known != ReferenceKnown) {
1130 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1131 <<
I->getFunction()->getName() <<
"\n";
1132 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1133 errs() <<
"SimplifyDemandedBits(): " << Known <<
"\n";
1148 Type *ITy =
I->getType();
1157 switch (
I->getOpcode()) {
1158 case Instruction::And: {
1173 return I->getOperand(0);
1175 return I->getOperand(1);
1179 case Instruction::Or: {
1196 return I->getOperand(0);
1198 return I->getOperand(1);
1202 case Instruction::Xor: {
1218 return I->getOperand(0);
1220 return I->getOperand(1);
1224 case Instruction::Add: {
1232 return I->getOperand(0);
1236 return I->getOperand(1);
1244 case Instruction::Sub: {
1252 return I->getOperand(0);
1261 case Instruction::AShr: {
1274 const APInt *ShiftRC;
1275 const APInt *ShiftLC;
1323 if (!ShlOp1 || !ShrOp1)
1328 unsigned BitWidth = Ty->getScalarSizeInBits();
1337 Known.
Zero &= DemandedMask;
1342 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1343 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1344 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1346 if (ShrAmt <= ShlAmt) {
1347 BitMask2 <<= (ShlAmt - ShrAmt);
1349 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1350 BitMask2.
ashr(ShrAmt - ShlAmt);
1354 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1355 if (ShrAmt == ShlAmt)
1362 if (ShrAmt < ShlAmt) {
1364 New = BinaryOperator::CreateShl(VarX, Amt);
1370 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1371 BinaryOperator::CreateAShr(VarX, Amt);
1373 New->setIsExact(
true);
1399 bool AllowMultipleUsers) {
1407 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1411 PoisonElts = EltMask;
1415 if (DemandedElts.
isZero()) {
1416 PoisonElts = EltMask;
1431 for (
unsigned i = 0; i != VWidth; ++i) {
1432 if (!DemandedElts[i]) {
1438 Constant *Elt =
C->getAggregateElement(i);
1439 if (!Elt)
return nullptr;
1448 return NewCV !=
C ? NewCV :
nullptr;
1455 if (!AllowMultipleUsers) {
1459 if (!V->hasOneUse()) {
1468 DemandedElts = EltMask;
1473 if (!
I)
return nullptr;
1475 bool MadeChange =
false;
1476 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1486 APInt PoisonElts2(VWidth, 0);
1487 APInt PoisonElts3(VWidth, 0);
1488 switch (
I->getOpcode()) {
1491 case Instruction::GetElementPtr: {
1509 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1513 PoisonElts = EltMask;
1516 if (
I->getOperand(i)->getType()->isVectorTy()) {
1517 APInt PoisonEltsOp(VWidth, 0);
1518 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1523 PoisonElts |= PoisonEltsOp;
1529 case Instruction::InsertElement: {
1536 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1543 APInt PreInsertDemandedElts = DemandedElts;
1545 PreInsertDemandedElts.
clearBit(IdxNo);
1553 if (PreInsertDemandedElts == 0 &&
1560 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1564 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1566 return I->getOperand(0);
1573 case Instruction::ShuffleVector: {
1575 assert(Shuffle->getOperand(0)->getType() ==
1576 Shuffle->getOperand(1)->getType() &&
1577 "Expected shuffle operands to have same type");
1582 if (
all_of(Shuffle->getShuffleMask(), [](
int Elt) { return Elt == 0; }) &&
1588 APInt LeftDemanded(OpWidth, 1);
1589 APInt LHSPoisonElts(OpWidth, 0);
1590 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1591 if (LHSPoisonElts[0])
1592 PoisonElts = EltMask;
1598 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1599 for (
unsigned i = 0; i < VWidth; i++) {
1600 if (DemandedElts[i]) {
1601 unsigned MaskVal = Shuffle->getMaskValue(i);
1602 if (MaskVal != -1u) {
1603 assert(MaskVal < OpWidth * 2 &&
1604 "shufflevector mask index out of range!");
1605 if (MaskVal < OpWidth)
1606 LeftDemanded.setBit(MaskVal);
1608 RightDemanded.
setBit(MaskVal - OpWidth);
1613 APInt LHSPoisonElts(OpWidth, 0);
1614 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1616 APInt RHSPoisonElts(OpWidth, 0);
1617 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1630 if (VWidth == OpWidth) {
1631 bool IsIdentityShuffle =
true;
1632 for (
unsigned i = 0; i < VWidth; i++) {
1633 unsigned MaskVal = Shuffle->getMaskValue(i);
1634 if (DemandedElts[i] && i != MaskVal) {
1635 IsIdentityShuffle =
false;
1639 if (IsIdentityShuffle)
1640 return Shuffle->getOperand(0);
1643 bool NewPoisonElts =
false;
1644 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1645 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1646 bool LHSUniform =
true;
1647 bool RHSUniform =
true;
1648 for (
unsigned i = 0; i < VWidth; i++) {
1649 unsigned MaskVal = Shuffle->getMaskValue(i);
1650 if (MaskVal == -1u) {
1652 }
else if (!DemandedElts[i]) {
1653 NewPoisonElts =
true;
1655 }
else if (MaskVal < OpWidth) {
1656 if (LHSPoisonElts[MaskVal]) {
1657 NewPoisonElts =
true;
1660 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1661 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1662 LHSUniform = LHSUniform && (MaskVal == i);
1665 if (RHSPoisonElts[MaskVal - OpWidth]) {
1666 NewPoisonElts =
true;
1669 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1670 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1671 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1687 if (LHSIdx < OpWidth && RHSUniform) {
1689 Op = Shuffle->getOperand(1);
1690 Value = CV->getOperand(LHSValIdx);
1694 if (RHSIdx < OpWidth && LHSUniform) {
1696 Op = Shuffle->getOperand(0);
1697 Value = CV->getOperand(RHSValIdx);
1710 if (NewPoisonElts) {
1713 for (
unsigned i = 0; i < VWidth; ++i) {
1717 Elts.
push_back(Shuffle->getMaskValue(i));
1719 Shuffle->setShuffleMask(Elts);
1724 case Instruction::Select: {
1734 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1738 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1740 for (
unsigned i = 0; i < VWidth; i++) {
1745 DemandedLHS.clearBit(i);
1751 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1752 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1756 PoisonElts = PoisonElts2 & PoisonElts3;
1759 case Instruction::BitCast: {
1764 APInt InputDemandedElts(InVWidth, 0);
1765 PoisonElts2 =
APInt(InVWidth, 0);
1768 if (VWidth == InVWidth) {
1772 InputDemandedElts = DemandedElts;
1773 }
else if ((VWidth % InVWidth) == 0) {
1777 Ratio = VWidth / InVWidth;
1778 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1779 if (DemandedElts[OutIdx])
1780 InputDemandedElts.
setBit(OutIdx / Ratio);
1781 }
else if ((InVWidth % VWidth) == 0) {
1785 Ratio = InVWidth / VWidth;
1786 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1787 if (DemandedElts[InIdx / Ratio])
1788 InputDemandedElts.
setBit(InIdx);
1794 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1796 if (VWidth == InVWidth) {
1797 PoisonElts = PoisonElts2;
1798 }
else if ((VWidth % InVWidth) == 0) {
1802 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1803 if (PoisonElts2[OutIdx / Ratio])
1804 PoisonElts.
setBit(OutIdx);
1805 }
else if ((InVWidth % VWidth) == 0) {
1809 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1812 PoisonElts.
setBit(OutIdx);
1819 case Instruction::FPTrunc:
1820 case Instruction::FPExt:
1821 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1824 case Instruction::Call: {
1827 switch (
II->getIntrinsicID()) {
1828 case Intrinsic::masked_gather:
1829 case Intrinsic::masked_load: {
1834 DemandedPassThrough(DemandedElts);
1836 for (
unsigned i = 0; i < VWidth; i++) {
1838 if (CElt->isNullValue())
1839 DemandedPtrs.clearBit(i);
1840 else if (CElt->isAllOnesValue())
1846 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1847 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1848 simplifyAndSetOp(
II, 3, DemandedPassThrough, PoisonElts3);
1852 PoisonElts = PoisonElts2 & PoisonElts3;
1858 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
1892 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
1895 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
1900 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
1905 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
1916 if (
DT.dominates(U,
I))
1922 if (
User *ShufBO = findShufBO(
true))
1924 if (
User *ShufBO = findShufBO(
false))
1928 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1929 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
1933 PoisonElts &= PoisonElts2;
1941 return MadeChange ?
I :
nullptr;
1954 if (Ty->isAggregateType())
1975 Type *VTy = V->getType();
1979 if (DemandedMask ==
fcNone)
1989 Value *FoldedToConst =
1991 return FoldedToConst == V ? nullptr : FoldedToConst;
1994 if (!
I->hasOneUse())
1998 if (FPOp->hasNoNaNs())
2000 if (FPOp->hasNoInfs())
2003 switch (
I->getOpcode()) {
2004 case Instruction::FNeg: {
2011 case Instruction::Call: {
2014 case Intrinsic::fabs:
2020 case Intrinsic::arithmetic_fence:
2024 case Intrinsic::copysign: {
2030 if ((DemandedMask &
fcNegative) == DemandedMask) {
2032 I->setOperand(1, ConstantFP::get(VTy, -1.0));
2036 if ((DemandedMask &
fcPositive) == DemandedMask) {
2054 case Instruction::Select: {
2061 return I->getOperand(2);
2063 return I->getOperand(1);
2066 Known = KnownLHS | KnownRHS;
2081 Use &U =
I->getOperandUse(OpNo);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file provides internal interfaces used to implement the InstCombine.
static cl::opt< unsigned > SimplifyDemandedVectorEltsDepthLimit("instcombine-simplify-vector-elts-depth", cl::desc("Depth limit when simplifying vector instructions and their operands"), cl::Hidden, cl::init(10))
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask)
For floating-point classes that resolve to a single bit pattern, return that value.
static cl::opt< bool > VerifyKnownBits("instcombine-verify-known-bits", cl::desc("Verify that computeKnownBits() and " "SimplifyDemandedBits() are consistent"), cl::Hidden, cl::init(false))
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
This file provides the interface for the instcombine pass implementation.
uint64_t IntrinsicInst * II
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
void setLowBits(unsigned loBits)
Set the bottom loBits bits.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
BinaryOps getOpcode() const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
static LLVM_ABI Constant * getInfinity(Type *Ty, bool Negative=false)
static LLVM_ABI Constant * getZero(Type *Ty, bool Negative=false)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
LLVM_ABI bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
A parsed version of the target data layout string in and methods for querying it.
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
KnownFPClass computeKnownFPClass(Value *Val, FastMathFlags FMF, FPClassTest Interested=fcAllFlags, const Instruction *CtxI=nullptr, unsigned Depth=0) const
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, unsigned Depth=0)
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseFPClass(Value *V, FPClassTest DemandedMask, KnownFPClass &Known, Instruction *CxtI, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CxtI=nullptr, unsigned Depth=0) const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CxtI, unsigned Depth=0) const
std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > Tys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
class_match< PoisonValue > m_Poison()
Match an arbitrary poison constant.
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
class_match< BinaryOperator > m_BinOp()
Match an arbitrary binary operation and ignore it.
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
class_match< ConstantInt > m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
IntrinsicID_match m_Intrinsic()
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
apint_match m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
gep_type_iterator gep_type_end(const User *GEP)
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
void resetAll()
Resets the known state of all bits.
KnownBits unionWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for either this or RHS or both.
KnownBits intersectWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for both this and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
FPClassTest KnownFPClasses
Floating-point classes the value could be one of.
void copysign(const KnownFPClass &Sign)
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.