LLVM  mainline
TargetRegisterInfo.cpp File Reference
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
Include dependency graph for TargetRegisterInfo.cpp:

Go to the source code of this file.


static void getAllocatableSetForRC (const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R)
static const TargetRegisterClassfirstCommonClass (const uint32_t *A, const uint32_t *B, const TargetRegisterInfo *TRI)

Function Documentation

static const TargetRegisterClass* firstCommonClass ( const uint32_t *  A,
const uint32_t *  B,
const TargetRegisterInfo TRI 
) [inline, static]
static void getAllocatableSetForRC ( const MachineFunction MF,
const TargetRegisterClass RC,
BitVector R 
) [static]

getAllocatableSetForRC - Toggle the bits that represent allocatable registers for the specific register class.

Definition at line 131 of file TargetRegisterInfo.cpp.

References llvm::TargetRegisterClass::getRawAllocationOrder(), llvm::TargetRegisterClass::isAllocatable(), and llvm::BitVector::set().

Referenced by llvm::TargetRegisterInfo::getAllocatableSet().