LLVM 19.0.0git
Public Member Functions | List of all members
llvm::SparcInstrInfo Class Reference

#include "Target/Sparc/SparcInstrInfo.h"

Inheritance diagram for llvm::SparcInstrInfo:
Inheritance graph
[legend]

Public Member Functions

 SparcInstrInfo (SparcSubtarget &ST)
 
const SparcRegisterInfogetRegisterInfo () const
 getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
 
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
 
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
 
MachineBasicBlockgetBranchDestBlock (const MachineInstr &MI) const override
 
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
 
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
 
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
 
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
 
bool isBranchOffsetInRange (unsigned BranchOpc, int64_t Offset) const override
 Determine if the branch target is in range.
 
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
 
Register getGlobalBaseReg (MachineFunction *MF) const
 
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
 GetInstSize - Return the number of bytes of code the specified instruction may be.
 
bool expandPostRAPseudo (MachineInstr &MI) const override
 

Detailed Description

Definition at line 38 of file SparcInstrInfo.h.

Constructor & Destructor Documentation

◆ SparcInstrInfo()

SparcInstrInfo::SparcInstrInfo ( SparcSubtarget ST)
explicit

Definition at line 42 of file SparcInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool SparcInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify = false 
) const
override

◆ copyPhysReg()

void SparcInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
const DebugLoc DL,
MCRegister  DestReg,
MCRegister  SrcReg,
bool  KillSrc 
) const
override

◆ expandPostRAPseudo()

bool SparcInstrInfo::expandPostRAPseudo ( MachineInstr MI) const
override

◆ getBranchDestBlock()

MachineBasicBlock * SparcInstrInfo::getBranchDestBlock ( const MachineInstr MI) const
override

Definition at line 213 of file SparcInstrInfo.cpp.

References llvm_unreachable, and MI.

◆ getGlobalBaseReg()

Register SparcInstrInfo::getGlobalBaseReg ( MachineFunction MF) const

◆ getInstSizeInBytes()

unsigned SparcInstrInfo::getInstSizeInBytes ( const MachineInstr MI) const
override

GetInstSize - Return the number of bytes of code the specified instruction may be.

This returns the maximum number of bytes.

Definition at line 628 of file SparcInstrInfo.cpp.

References llvm::get(), llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), and MI.

Referenced by removeBranch().

◆ getRegisterInfo()

const SparcRegisterInfo & llvm::SparcInstrInfo::getRegisterInfo ( ) const
inline

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 49 of file SparcInstrInfo.h.

Referenced by copyPhysReg(), and llvm::SparcSubtarget::getRegisterInfo().

◆ insertBranch()

unsigned SparcInstrInfo::insertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TBB,
MachineBasicBlock FBB,
ArrayRef< MachineOperand Cond,
const DebugLoc DL,
int *  BytesAdded = nullptr 
) const
override

◆ isBranchOffsetInRange()

bool SparcInstrInfo::isBranchOffsetInRange ( unsigned  BranchOpc,
int64_t  Offset 
) const
override

Determine if the branch target is in range.

Definition at line 401 of file SparcInstrInfo.cpp.

References assert(), BPccDisplacementBits, BPrDisplacementBits, llvm::isIntN(), llvm_unreachable, and llvm::Offset.

◆ isLoadFromStackSlot()

Register SparcInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 51 of file SparcInstrInfo.cpp.

References MI.

◆ isStoreToStackSlot()

Register SparcInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 70 of file SparcInstrInfo.cpp.

References MI.

◆ loadRegFromStackSlot()

void SparcInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
Register  VReg 
) const
override

◆ removeBranch()

unsigned SparcInstrInfo::removeBranch ( MachineBasicBlock MBB,
int *  BytesRemoved = nullptr 
) const
override

◆ reverseBranchCondition()

bool SparcInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
override

Definition at line 393 of file SparcInstrInfo.cpp.

References assert(), CC, Cond, and GetOppositeBranchCondition().

◆ storeRegToStackSlot()

void SparcInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
Register  VReg 
) const
override

The documentation for this class was generated from the following files: