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HexagonInstPrinter.cpp
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1 //===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class prints an Hexagon MCInst to a .s file.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "HexagonInstPrinter.h"
15 #include "HexagonAsmPrinter.h"
18 #include "llvm/MC/MCAsmInfo.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "asm-printer"
27 
28 #define GET_INSTRUCTION_NAME
29 #include "HexagonGenAsmWriter.inc"
30 
32  MCInstrInfo const &MII,
33  MCRegisterInfo const &MRI)
34  : MCInstPrinter(MAI, MII, MRI), MII(MII), HasExtender(false) {
35 }
36 
38  return MII.getName(Opcode);
39 }
40 
41 void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
42  O << getRegName(RegNo);
43 }
44 
46  return getRegisterName(RegNo);
47 }
48 
49 void HexagonInstPrinter::setExtender(MCInst const &MCI) {
50  HasExtender = HexagonMCInstrInfo::isImmext(MCI);
51 }
52 
54  StringRef Annot, const MCSubtargetInfo &STI) {
58  HasExtender = false;
59  for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
60  MCInst const &MCI = *I.getInst();
61  if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
62  printInstruction(MCI.getOperand(1).getInst(), OS);
63  OS << '\v';
64  HasExtender = false;
65  printInstruction(MCI.getOperand(0).getInst(), OS);
66  } else
67  printInstruction(&MCI, OS);
68  setExtender(MCI);
69  OS << "\n";
70  }
71 
72  auto Separator = "";
74  OS << Separator;
75  Separator = " ";
76  MCInst ME;
77  ME.setOpcode(Hexagon::ENDLOOP0);
78  printInstruction(&ME, OS);
79  }
81  OS << Separator;
82  MCInst ME;
83  ME.setOpcode(Hexagon::ENDLOOP1);
84  printInstruction(&ME, OS);
85  }
86 }
87 
88 void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
89  raw_ostream &O) const {
90  if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo &&
91  (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI)))
92  O << "#";
93  MCOperand const &MO = MI->getOperand(OpNo);
94  if (MO.isReg()) {
95  O << getRegisterName(MO.getReg());
96  } else if (MO.isExpr()) {
97  int64_t Value;
98  if (MO.getExpr()->evaluateAsAbsolute(Value))
99  O << formatImm(Value);
100  else
101  O << *MO.getExpr();
102  } else {
103  llvm_unreachable("Unknown operand");
104  }
105 }
106 
107 void HexagonInstPrinter::printExtOperand(MCInst const *MI, unsigned OpNo,
108  raw_ostream &O) const {
109  printOperand(MI, OpNo, O);
110 }
111 
113  unsigned OpNo,
114  raw_ostream &O) const {
115  O << MI->getOperand(OpNo).getImm();
116 }
117 
119  raw_ostream &O) const {
120  O << -MI->getOperand(OpNo).getImm();
121 }
122 
124  raw_ostream &O) const {
125  O << -1;
126 }
127 
129  raw_ostream &O) const {
130  printOperand(MI, OpNo, O);
131 }
132 
133 void HexagonInstPrinter::printJumpTable(MCInst const *MI, unsigned OpNo,
134  raw_ostream &O) const {
135  assert(MI->getOperand(OpNo).isExpr() && "Expecting expression");
136 
137  printOperand(MI, OpNo, O);
138 }
139 
141  raw_ostream &O) const {
142  assert(MI->getOperand(OpNo).isExpr() && "Expecting expression");
143 
144  printOperand(MI, OpNo, O);
145 }
146 
148  raw_ostream &O) const {
149  // Branches can take an immediate operand. This is used by the branch
150  // selection pass to print $+8, an eight byte displacement from the PC.
151  llvm_unreachable("Unknown branch operand.");
152 }
153 
154 void HexagonInstPrinter::printCallOperand(MCInst const *MI, unsigned OpNo,
155  raw_ostream &O) const {}
156 
158  raw_ostream &O) const {}
159 
161  raw_ostream &O) const {}
162 
163 void HexagonInstPrinter::printSymbol(MCInst const *MI, unsigned OpNo,
164  raw_ostream &O, bool hi) const {
165  assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand");
166 
167  O << '#' << (hi ? "HI" : "LO") << '(';
168  O << '#';
169  printOperand(MI, OpNo, O);
170  O << ')';
171 }
172 
173 void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
174  raw_ostream &O) const {
175  MCOperand const &MO = MI->getOperand(OpNo);
176  assert (MO.isExpr());
177  MCExpr const &Expr = *MO.getExpr();
178  int64_t Value;
179  if (Expr.evaluateAsAbsolute(Value))
180  O << format("0x%" PRIx64, Value);
181  else {
182  if (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI))
183  if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo)
184  O << "##";
185  O << Expr;
186  }
187 }
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
bool isImm() const
Definition: MCInst.h:59
void printRegName(raw_ostream &O, unsigned RegNo) const override
Print the assembler register name.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void printBrtarget(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printNegImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printUnsignedImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
bool isBundle(MCInst const &MCI)
void printGlobalOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
bool isReg() const
Definition: MCInst.h:58
void printConstantPool(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
bool isOuterLoop(MCInst const &MCI)
void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
StringRef getRegName(unsigned RegNo) const
void printCallOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
bool isImmext(MCInst const &MCI)
#define HEXAGON_PACKET_SIZE
Definition: Hexagon.h:33
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
iterator_range< Hexagon::PacketIterator > bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI)
void printAbsAddrOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:65
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Definition: MCInstPrinter.h:97
const MCInst * getInst() const
Definition: MCInst.h:106
const MCExpr * getExpr() const
Definition: MCInst.h:96
virtual StringRef getOpcodeName(unsigned Opcode) const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
int64_t getImm() const
Definition: MCInst.h:76
void printJumpTable(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
unsigned const MachineRegisterInfo * MRI
void printExtOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printSymbol(MCInst const *MI, unsigned OpNo, raw_ostream &O, bool hi) const
void printPredicateOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
bool isExpr() const
Definition: MCInst.h:61
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
Definition: MCInstrInfo.h:51
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
void setOpcode(unsigned Op)
Definition: MCInst.h:171
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:180
void printInstruction(MCInst const *MI, raw_ostream &O)
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:41
HexagonInstPrinter(MCAsmInfo const &MAI, MCInstrInfo const &MII, MCRegisterInfo const &MRI)
#define I(x, y, z)
Definition: MD5.cpp:58
MCSubtargetInfo - Generic base class for all target subtargets.
void printNOneImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
size_t bundleSize(MCInst const &MCI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isInnerLoop(MCInst const &MCI)
LLVM Value Representation.
Definition: Value.h:73
static char const * getRegisterName(unsigned RegNo)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printBranchOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const