#include "AArch64.h"
#include "AArch64MachineFunctionInfo.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"

Classes
struct	LOHInfo
	State tracked per register. More...

Macros
#define	DEBUG_TYPE "aarch64-collect-loh"

#define	AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)"

Functions
	STATISTIC (NumADRPSimpleCandidate, "Number of simplifiable ADRP dominate by another")

	STATISTIC (NumADDToSTR, "Number of simplifiable STR reachable by ADD")

	STATISTIC (NumLDRToSTR, "Number of simplifiable STR reachable by LDR")

	STATISTIC (NumADDToLDR, "Number of simplifiable LDR reachable by ADD")

	STATISTIC (NumLDRToLDR, "Number of simplifiable LDR reachable by LDR")

	STATISTIC (NumADRPToLDR, "Number of simplifiable LDR reachable by ADRP")

	STATISTIC (NumADRSimpleCandidate, "Number of simplifiable ADRP + ADD")

	INITIALIZE_PASS (AArch64CollectLOH, "aarch64-collect-loh", AARCH64_COLLECT_LOH_NAME, false, false) static bool canAddBePartOfLOH(const MachineInstr &MI)

static bool	canDefBePartOfLOH (const MachineInstr &MI)
	Answer the following question: Can Def be one of the definition involved in a part of a LOH?

static bool	isCandidateStore (const MachineInstr &MI, const MachineOperand &MO)
	Check whether the given instruction can the end of a LOH chain involving a store.

static bool	isCandidateLoad (const MachineInstr &MI)
	Check whether the given instruction can be the end of a LOH chain involving a load.

static bool	supportLoadFromLiteral (const MachineInstr &MI)
	Check whether the given instruction can load a litteral.

static int	mapRegToGPRIndex (MCPhysReg Reg)
	Map register number to index from 0-30.

static void	handleUse (const MachineInstr &MI, const MachineOperand &MO, LOHInfo &Info)
	Update state `Info` given `MI` uses the tracked register.

static void	handleClobber (LOHInfo &Info)
	Update state `Info` given the tracked register is clobbered.

static bool	handleMiddleInst (const MachineInstr &MI, LOHInfo &DefInfo, LOHInfo &OpInfo)
	Update state `Info` given that `MI` is possibly the middle instruction of an LOH involving 3 instructions.

static void	handleADRP (const MachineInstr &MI, AArch64FunctionInfo &AFI, LOHInfo &Info, LOHInfo *LOHInfos)
	Update state when seeing and ADRP instruction.

static void	handleRegMaskClobber (const uint32_t RegMask, MCPhysReg Reg, LOHInfo LOHInfos)

static void	handleNormalInst (const MachineInstr &MI, LOHInfo *LOHInfos)

Variables
static const unsigned	N_GPR_REGS = 31
	Number of GPR registers traked by mapRegToGPRIndex()

Macro Definition Documentation

◆ AARCH64_COLLECT_LOH_NAME

#define AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)"

Definition at line 124 of file AArch64CollectLOH.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE "aarch64-collect-loh"

Definition at line 113 of file AArch64CollectLOH.cpp.

Function Documentation

◆ canDefBePartOfLOH()

static bool canDefBePartOfLOH ( const MachineInstr & MI )

static

Answer the following question: Can Def be one of the definition involved in a part of a LOH?

Definition at line 169 of file AArch64CollectLOH.cpp.

References MI, llvm::MachineOperand::MO_GlobalAddress, and llvm::AArch64II::MO_GOT.

◆ handleADRP()

static void handleADRP	(	const MachineInstr &	MI,
		AArch64FunctionInfo &	AFI,
		LOHInfo &	Info,
		LOHInfo *	LOHInfos
	)

static

Update state when seeing and ADRP instruction.

Definition at line 378 of file AArch64CollectLOH.cpp.

References llvm::AArch64FunctionInfo::addLOHDirective(), llvm::dbgs(), llvm::MachineBasicBlock::end(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), handleClobber(), Info, LLVM_DEBUG, llvm_unreachable, mapRegToGPRIndex(), llvm::MCLOH_AdrpAdd, llvm::MCLOH_AdrpAddLdr, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpAdrp, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGot, llvm::MCLOH_AdrpLdrGotLdr, llvm::MCLOH_AdrpLdrGotStr, MI, LOHInfo::MultiUsers, llvm::next_nodbg(), LOHInfo::OneUser, and supportLoadFromLiteral().

◆ handleClobber()

static void handleClobber ( LOHInfo & Info )

static

Update state Info given the tracked register is clobbered.

Definition at line 321 of file AArch64CollectLOH.cpp.

References Info.

Referenced by handleADRP(), handleMiddleInst(), handleNormalInst(), and handleRegMaskClobber().

◆ handleMiddleInst()

static bool handleMiddleInst	(	const MachineInstr &	MI,
		LOHInfo &	DefInfo,
		LOHInfo &	OpInfo
	)

static

Update state Info given that MI is possibly the middle instruction of an LOH involving 3 instructions.

Definition at line 330 of file AArch64CollectLOH.cpp.

References assert(), handleClobber(), LOHInfo::IsCandidate, LOHInfo::LastADRP, llvm::MCLOH_AdrpAddLdr, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGotLdr, llvm::MCLOH_AdrpLdrGotStr, MI, LOHInfo::MI1, llvm::AArch64II::MO_GOT, LOHInfo::OneUser, and LOHInfo::Type.

◆ handleNormalInst()

static void handleNormalInst	(	const MachineInstr &	MI,
		LOHInfo *	LOHInfos
	)

static

Definition at line 493 of file AArch64CollectLOH.cpp.

References handleClobber(), handleRegMaskClobber(), handleUse(), Idx, llvm::SmallSet< T, N, C >::insert(), mapRegToGPRIndex(), and MI.

◆ handleRegMaskClobber()

static void handleRegMaskClobber	(	const uint32_t *	RegMask,
		MCPhysReg	Reg,
		LOHInfo *	LOHInfos
	)

static

Definition at line 484 of file AArch64CollectLOH.cpp.

References llvm::MachineOperand::clobbersPhysReg(), handleClobber(), Idx, and mapRegToGPRIndex().

Referenced by handleNormalInst().

◆ handleUse()

static void handleUse	(	const MachineInstr &	MI,
		const MachineOperand &	MO,
		LOHInfo &	Info
	)

static

Update state Info given MI uses the tracked register.

Definition at line 285 of file AArch64CollectLOH.cpp.

References Info, isCandidateLoad(), isCandidateStore(), llvm::MCLOH_AdrpAdd, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGot, MI, and llvm::AArch64II::MO_GOT.

Referenced by handleNormalInst().

◆ INITIALIZE_PASS()

INITIALIZE_PASS	(	AArch64CollectLOH	,
		"aarch64-collect-loh"	,
		AARCH64_COLLECT_LOH_NAME	,
		false	,
		false
	)		const &

Definition at line 151 of file AArch64CollectLOH.cpp.

References MI, llvm::MachineOperand::MO_BlockAddress, llvm::MachineOperand::MO_ConstantPoolIndex, llvm::MachineOperand::MO_GlobalAddress, and llvm::MachineOperand::MO_JumpTableIndex.

◆ isCandidateLoad()

static bool isCandidateLoad ( const MachineInstr & MI )

static

Check whether the given instruction can be the end of a LOH chain involving a load.

Definition at line 216 of file AArch64CollectLOH.cpp.

References MI, and llvm::AArch64II::MO_GOT.

Referenced by handleUse().

◆ isCandidateStore()

static bool isCandidateStore	(	const MachineInstr &	MI,
		const MachineOperand &	MO
	)

static

Check whether the given instruction can the end of a LOH chain involving a store.

Definition at line 192 of file AArch64CollectLOH.cpp.

References llvm::MachineOperand::getOperandNo(), and MI.

Referenced by handleUse().

◆ mapRegToGPRIndex()

static int mapRegToGPRIndex ( MCPhysReg Reg )

static

Map register number to index from 0-30.

Definition at line 254 of file AArch64CollectLOH.cpp.

References N_GPR_REGS.

Referenced by handleADRP(), handleNormalInst(), and handleRegMaskClobber().

◆ STATISTIC() [1/7]

STATISTIC	(	NumADDToLDR	,
		"Number of simplifiable LDR reachable by ADD"
	)

◆ STATISTIC() [2/7]

STATISTIC	(	NumADDToSTR	,
		"Number of simplifiable STR reachable by ADD"
	)

◆ STATISTIC() [3/7]

STATISTIC	(	NumADRPSimpleCandidate	,
		"Number of simplifiable ADRP dominate by another"
	)

◆ STATISTIC() [4/7]

STATISTIC	(	NumADRPToLDR	,
		"Number of simplifiable LDR reachable by ADRP"
	)

◆ STATISTIC() [5/7]

STATISTIC	(	NumADRSimpleCandidate	,
		"Number of simplifiable ADRP + ADD"
	)

◆ STATISTIC() [6/7]

STATISTIC	(	NumLDRToLDR	,
		"Number of simplifiable LDR reachable by LDR"
	)

◆ STATISTIC() [7/7]

STATISTIC	(	NumLDRToSTR	,
		"Number of simplifiable STR reachable by LDR"
	)

◆ supportLoadFromLiteral()

static bool supportLoadFromLiteral ( const MachineInstr & MI )

static

Check whether the given instruction can load a litteral.

Definition at line 237 of file AArch64CollectLOH.cpp.

References MI.

Referenced by handleADRP().

Variable Documentation

◆ N_GPR_REGS

const unsigned N_GPR_REGS = 31

static

Number of GPR registers traked by mapRegToGPRIndex()

Definition at line 252 of file AArch64CollectLOH.cpp.

Referenced by mapRegToGPRIndex().

Classes

Macros

Functions

Variables

Macro Definition Documentation

◆ AARCH64_COLLECT_LOH_NAME

◆ DEBUG_TYPE

Function Documentation

◆ canDefBePartOfLOH()

◆ handleADRP()

◆ handleClobber()

◆ handleMiddleInst()

◆ handleNormalInst()

◆ handleRegMaskClobber()

◆ handleUse()

◆ INITIALIZE_PASS()

◆ isCandidateLoad()

◆ isCandidateStore()

◆ mapRegToGPRIndex()

◆ STATISTIC() [1/7]

◆ STATISTIC() [2/7]

◆ STATISTIC() [3/7]

◆ STATISTIC() [4/7]

◆ STATISTIC() [5/7]

◆ STATISTIC() [6/7]

◆ STATISTIC() [7/7]

◆ supportLoadFromLiteral()

Variable Documentation

◆ N_GPR_REGS