LLVM 23.0.0git
AArch64FrameLowering.h
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1//==-- AArch64FrameLowering.h - TargetFrameLowering for AArch64 --*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
14#define LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
15
19
20namespace llvm {
21
22class TargetLowering;
27
32
34public:
37 true /*StackRealignable*/) {}
38
39 void resetCFIToInitialState(MachineBasicBlock &MBB) const override;
40
43 MachineBasicBlock::iterator I) const override;
44
45 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
46 /// the function.
47 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
48 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
49
50 /// Harden the entire function with pac-ret.
51 ///
52 /// If pac-ret+leaf is requested, we want to harden as much code as possible.
53 /// This function inserts pac-ret hardening at the points where prologue and
54 /// epilogue are traditionally inserted, ignoring possible shrink-wrapping
55 /// optimization.
57
58 bool enableCFIFixup(const MachineFunction &MF) const override;
59
60 bool enableFullCFIFixup(const MachineFunction &MF) const override;
61
62 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
63
65 Register &FrameReg) const override;
67 int FI) const override;
69 Register &FrameReg, bool PreferFP,
70 bool ForSimm) const;
72 int64_t ObjectOffset, bool isFixed,
74 Register &FrameReg, bool PreferFP,
75 bool ForSimm) const;
79 const TargetRegisterInfo *TRI) const override;
80
81 bool
85 const TargetRegisterInfo *TRI) const override;
86
87 /// Can this function use the red zone for local allocations.
88 bool canUseRedZone(const MachineFunction &MF) const;
89
90 /// Returns how much of the incoming argument stack area (in bytes) we should
91 /// clean up in an epilogue. For the C calling convention this will be 0, for
92 /// guaranteed tail call conventions it can be positive (a normal return or a
93 /// tail call to a function that uses less stack space for arguments) or
94 /// negative (for a tail call to a function that needs more stack space than
95 /// us for arguments).
97 MachineBasicBlock &MBB) const;
98
99 bool hasReservedCallFrame(const MachineFunction &MF) const override;
100
101 bool
103 const TargetRegisterInfo *TRI,
104 std::vector<CalleeSavedInfo> &CSI) const override;
105
107 RegScavenger *RS) const override;
108
109 /// Returns true if the target will correctly handle shrink wrapping.
110 bool enableShrinkWrapping(const MachineFunction &MF) const override {
111 return true;
112 }
113
114 bool enableStackSlotScavenging(const MachineFunction &MF) const override;
116
118 RegScavenger *RS) const override;
119
120 void
122 RegScavenger *RS) const override;
123
124 unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override;
125
126 unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const;
127
130 Register &FrameReg,
131 bool IgnoreSPUpdates) const override;
133 int FI) const override;
134 int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const;
135
137 switch (ID) {
138 default:
139 return false;
144 return true;
145 }
146 }
147
148 bool isStackIdSafeForLocalArea(unsigned StackId) const override {
149 // We don't support putting SVE objects into the pre-allocated local
150 // frame block at the moment.
151 return (StackId != TargetStackID::ScalableVector &&
153 }
154
155 void
157 SmallVectorImpl<int> &ObjectsToAllocate) const override;
158
159 bool isFPReserved(const MachineFunction &MF) const;
160
161 bool needsWinCFI(const MachineFunction &MF) const;
162
163 bool requiresSaveVG(const MachineFunction &MF) const;
164
165 /// Returns the size of the entire ZPR stackframe (calleesaves + spills).
167
168 /// Returns the size of the entire PPR stackframe (calleesaves + spills +
169 /// hazard padding).
171
172 /// Returns the size of the entire SVE stackframe (PPRs + ZPRs).
174 return getZPRStackSize(MF) + getPPRStackSize(MF);
175 }
176
180
181 // Windows unwind can't represent the required stack adjustments if we have
182 // both SVE callee-saves and dynamic stack allocations, and the frame
183 // pointer is before the SVE spills. The allocation of the frame pointer
184 // must be the last instruction in the prologue so the unwinder can restore
185 // the stack pointer correctly. (And there isn't any unwind opcode for
186 // `addvl sp, x29, -17`.)
187 //
188 // Because of this, we do spills in the opposite order on Windows: first SVE,
189 // then GPRs. The main side-effect of this is that it makes accessing
190 // parameters passed on the stack more expensive.
191 //
192 // We could consider rearranging the spills for simpler cases.
194
195protected:
196 bool hasFPImpl(const MachineFunction &MF) const override;
197
198private:
199 /// Returns true if a homogeneous prolog or epilog code can be emitted
200 /// for the size optimization. If so, HOM_Prolog/HOM_Epilog pseudo
201 /// instructions are emitted in place. When Exit block is given, this check is
202 /// for epilog.
203 bool homogeneousPrologEpilog(MachineFunction &MF,
204 MachineBasicBlock *Exit = nullptr) const;
205
206 /// Returns true if CSRs should be paired.
207 bool producePairRegisters(MachineFunction &MF) const;
208
209 /// Make a determination whether a Hazard slot is used and create it if
210 /// needed.
211 void determineStackHazardSlot(MachineFunction &MF,
212 BitVector &SavedRegs) const;
213
214 /// Emit target zero call-used regs.
215 void emitZeroCallUsedRegs(BitVector RegsToZero,
216 MachineBasicBlock &MBB) const override;
217
218 /// Replace a StackProbe stub (if any) with the actual probe code inline
219 void inlineStackProbe(MachineFunction &MF,
220 MachineBasicBlock &PrologueMBB) const override;
221
222 void inlineStackProbeFixed(MachineBasicBlock::iterator MBBI,
223 Register ScratchReg, int64_t FrameSize,
224 StackOffset CFAOffset) const;
225
227 inlineStackProbeLoopExactMultiple(MachineBasicBlock::iterator MBBI,
228 int64_t NegProbeSize,
229 Register TargetReg) const;
230
231 void emitRemarks(const MachineFunction &MF,
232 MachineOptimizationRemarkEmitter *ORE) const override;
233
234 bool windowsRequiresStackProbe(const MachineFunction &MF,
235 uint64_t StackSizeInBytes) const;
236
237 bool shouldSignReturnAddressEverywhere(const MachineFunction &MF) const;
238
239 StackOffset getFPOffset(const MachineFunction &MF,
240 int64_t ObjectOffset) const;
241
242 StackOffset getStackOffset(const MachineFunction &MF,
243 int64_t ObjectOffset) const;
244
245 // Given a load or a store instruction, generate an appropriate unwinding SEH
246 // code on Windows.
248 const AArch64InstrInfo &TII,
249 MachineInstr::MIFlag Flag) const;
250
251 // Find a scratch register that we can use at the start of the prologue to
252 // re-align the stack pointer. We avoid using callee-save registers since
253 // they may appear to be free when this is called from canUseAsPrologue
254 // (during shrink wrapping), but then no longer be free when this is called
255 // from emitPrologue.
256 //
257 // FIXME: This is a bit conservative, since in the above case we could use one
258 // of the callee-save registers as a scratch temp to re-align the stack
259 // pointer, but we would then have to make sure that we were in fact saving at
260 // least one callee-save register in the prologue, which is additional
261 // complexity that doesn't seem worth the benefit.
263 bool HasCall = false) const;
264
265 /// Returns the size of the fixed object area (allocated next to sp on entry)
266 /// On Win64 this may include a var args area and an UnwindHelp object for EH.
267 unsigned getFixedObjectSize(const MachineFunction &MF,
268 const AArch64FunctionInfo *AFI, bool IsWin64,
269 bool IsFunclet) const;
270};
271
272} // End llvm namespace
273
274#endif
static MachineBasicBlock::iterator insertSEH(MachineBasicBlock::iterator MBBI, const TargetInstrInfo &TII, unsigned Flags)
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition MD5.cpp:57
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
Register const TargetRegisterInfo * TRI
static MCRegister findScratchNonCalleeSaveRegister(MachineRegisterInfo &MRI, LiveRegUnits &LiveUnits, const TargetRegisterClass &RC, bool Unused=false)
A helper class for emitting the epilogue.
StackOffset getSVEStackSize(const MachineFunction &MF) const
Returns the size of the entire SVE stackframe (PPRs + ZPRs).
StackOffset getZPRStackSize(const MachineFunction &MF) const
Returns the size of the entire ZPR stackframe (calleesaves + spills).
void processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameIndicesReplaced - This method is called immediately before MO_FrameIndex op...
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
bool enableStackSlotScavenging(const MachineFunction &MF) const override
Returns true if the stack slot holes in the fixed and callee-save stack area should be used when allo...
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
bool enableFullCFIFixup(const MachineFunction &MF) const override
enableFullCFIFixup - Returns true if we may need to fix the unwind information such that it is accura...
StackOffset getFrameIndexReferenceFromSP(const MachineFunction &MF, int FI) const override
getFrameIndexReferenceFromSP - This method returns the offset from the stack pointer to the slot of t...
bool enableCFIFixup(const MachineFunction &MF) const override
Returns true if we may need to fix the unwind information for the function.
StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF, int FI) const override
getNonLocalFrameIndexReference - This method returns the offset used to reference a frame index locat...
TargetStackID::Value getStackIDForScalableVectors() const override
Returns the StackID that scalable vectors should be associated with.
bool hasFPImpl(const MachineFunction &MF) const override
hasFPImpl - Return true if the specified function should have a dedicated frame pointer register.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void resetCFIToInitialState(MachineBasicBlock &MBB) const override
Emit CFI instructions that recreate the state of the unwind information upon function entry.
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
bool hasSVECalleeSavesAboveFrameRecord(const MachineFunction &MF) const
StackOffset resolveFrameOffsetReference(const MachineFunction &MF, int64_t ObjectOffset, bool isFixed, TargetStackID::Value StackID, Register &FrameReg, bool PreferFP, bool ForSimm) const
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
bool canUseRedZone(const MachineFunction &MF) const
Can this function use the red zone for local allocations.
bool needsWinCFI(const MachineFunction &MF) const
bool isSupportedStackID(TargetStackID::Value ID) const override
bool isFPReserved(const MachineFunction &MF) const
Should the Frame Pointer be reserved for the current function?
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const
unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const
Funclets only need to account for space for the callee saved registers, as the locals are accounted f...
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack frame.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
StackOffset getPPRStackSize(const MachineFunction &MF) const
Returns the size of the entire PPR stackframe (calleesaves + spills + hazard padding).
int64_t getArgumentStackToRestore(MachineFunction &MF, MachineBasicBlock &MBB) const
Returns how much of the incoming argument stack area (in bytes) we should clean up in an epilogue.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - Provide a base+offset reference to an FI slot for debug info.
StackOffset getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const override
For Win64 AArch64 EH, the offset to the Unwind object is from the SP before the update.
bool isStackIdSafeForLocalArea(unsigned StackId) const override
This method returns whether or not it is safe for an object with the given stack id to be bundled int...
StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg, bool PreferFP, bool ForSimm) const
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
The parent frame offset (aka dispFrame) is only used on X86_64 to retrieve the parent's frame pointer...
bool requiresSaveVG(const MachineFunction &MF) const
void emitPacRetPlusLeafHardening(MachineFunction &MF) const
Harden the entire function with pac-ret.
AArch64FunctionInfo - This class is derived from MachineFunctionInfo and contains private AArch64-spe...
A helper class for emitting the prologue.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
MachineInstrBundleIterator< MachineInstr > iterator
Represent a mutable reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:294
Wrapper class representing virtual and physical registers.
Definition Register.h:20
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
TargetFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl=Align(1), bool StackReal=true)
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39