27#define DEBUG_TYPE "asm-printer"
32#define PRINT_ALIAS_INSTR
33#include "AVRGenAsmWriter.inc"
38 unsigned Opcode =
MI->getOpcode();
48 printOperand(
MI, 0, O);
51 if (Opcode == AVR::LDRdPtrPd)
54 printOperand(
MI, 1, O);
56 if (Opcode == AVR::LDRdPtrPi)
61 printOperand(
MI, 0, O);
63 printOperand(
MI, 1, O);
69 if (Opcode == AVR::STPtrPdRr)
72 printOperand(
MI, 1, O);
74 if (Opcode == AVR::STPtrPiRr)
78 printOperand(
MI, 2, O);
95 RegNum = (RegLoNum != AVR::NoRegister) ? RegLoNum : RegNum;
98 return getRegisterName(RegNum);
101void AVRInstPrinter::printOperand(
const MCInst *
MI,
unsigned OpNo,
104 if (MOI.
RegClass == AVR::ZREGRegClassID) {
111 if (OpNo >=
MI->size()) {
121 const MCOperand &
Op =
MI->getOperand(OpNo);
124 bool isPtrReg = (MOI.
RegClass == AVR::PTRREGSRegClassID) ||
125 (MOI.
RegClass == AVR::PTRDISPREGSRegClassID) ||
126 (MOI.
RegClass == AVR::ZREGRegClassID);
129 O << getRegisterName(
Op.getReg(), AVR::ptr);
133 }
else if (
Op.isImm()) {
136 assert(
Op.isExpr() &&
"Unknown operand kind in printOperand");
143void AVRInstPrinter::printPCRelImm(
const MCInst *
MI,
unsigned OpNo,
145 if (OpNo >=
MI->size()) {
155 const MCOperand &
Op =
MI->getOperand(OpNo);
158 int64_t
Imm =
Op.getImm();
168 assert(
Op.isExpr() &&
"Unknown pcrel immediate operand");
173void AVRInstPrinter::printMemri(
const MCInst *
MI,
unsigned OpNo,
175 assert(
MI->getOperand(OpNo).isReg() &&
176 "Expected a register for the first operand");
178 const MCOperand &OffsetOp =
MI->getOperand(OpNo + 1);
181 printOperand(
MI, OpNo, O);
184 if (OffsetOp.isImm()) {
185 int64_t
Offset = OffsetOp.getImm();
191 }
else if (OffsetOp.isExpr()) {
192 O << *OffsetOp.getExpr();
unsigned const MachineRegisterInfo * MRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
static const char * getPrettyRegisterName(unsigned RegNo, MCRegisterInfo const &MRI)
const MCRegisterInfo & MRI
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Instances of this class represent a single low-level machine instruction.
unsigned getOpcode() const
ArrayRef< MCOperandInfo > operands() const
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
This holds information about one operand of a machine instruction, indicating the register class for ...
int16_t RegClass
This specifies the register class enumeration of the operand if the operand is a register.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
DWARFExpression::Operation Op