LLVM 20.0.0git
LanaiAsmBackend.cpp
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1//===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "LanaiFixupKinds.h"
12#include "llvm/MC/MCAssembler.h"
20
21using namespace llvm;
22
23// Prepare value for the target space
24static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
25 switch (Kind) {
26 case FK_Data_1:
27 case FK_Data_2:
28 case FK_Data_4:
29 case FK_Data_8:
30 return Value;
37 return Value;
38 default:
39 llvm_unreachable("Unknown fixup kind!");
40 }
41}
42
43namespace {
44class LanaiAsmBackend : public MCAsmBackend {
45 Triple::OSType OSType;
46
47public:
48 LanaiAsmBackend(const Target &T, Triple::OSType OST)
49 : MCAsmBackend(llvm::endianness::big), OSType(OST) {}
50
51 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
53 uint64_t Value, bool IsResolved,
54 const MCSubtargetInfo *STI) const override;
55
56 std::unique_ptr<MCObjectTargetWriter>
57 createObjectTargetWriter() const override;
58
59 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
60
61 unsigned getNumFixupKinds() const override {
63 }
64
66 const MCSubtargetInfo *STI) const override;
67};
68
69bool LanaiAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
70 const MCSubtargetInfo *STI) const {
71 if ((Count % 4) != 0)
72 return false;
73
74 for (uint64_t i = 0; i < Count; i += 4)
75 OS.write("\x15\0\0\0", 4);
76
77 return true;
78}
79
80void LanaiAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
81 const MCValue &Target,
83 bool /*IsResolved*/,
84 const MCSubtargetInfo * /*STI*/) const {
85 MCFixupKind Kind = Fixup.getKind();
86 Value = adjustFixupValue(static_cast<unsigned>(Kind), Value);
87
88 if (!Value)
89 return; // This value doesn't change the encoding
90
91 // Where in the object and where the number of bytes that need
92 // fixing up
93 unsigned Offset = Fixup.getOffset();
94 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
95 unsigned FullSize = 4;
96
97 // Grab current value, if any, from bits.
98 uint64_t CurVal = 0;
99
100 // Load instruction and apply value
101 for (unsigned i = 0; i != NumBytes; ++i) {
102 unsigned Idx = (FullSize - 1 - i);
103 CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Offset + Idx]))
104 << (i * 8);
105 }
106
107 uint64_t Mask =
108 (static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
109 CurVal |= Value & Mask;
110
111 // Write out the fixed up bytes back to the code/data bits.
112 for (unsigned i = 0; i != NumBytes; ++i) {
113 unsigned Idx = (FullSize - 1 - i);
114 Data[Offset + Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff);
115 }
116}
117
118std::unique_ptr<MCObjectTargetWriter>
119LanaiAsmBackend::createObjectTargetWriter() const {
121}
122
123const MCFixupKindInfo &
124LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
125 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
126 // This table *must* be in same the order of fixup_* kinds in
127 // LanaiFixupKinds.h.
128 // Note: The number of bits indicated here are assumed to be contiguous.
129 // This does not hold true for LANAI_21 and LANAI_21_F which are applied
130 // to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
131 // here are used only for cosmetic purposes, we set the size to 16 bits
132 // for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
133 // no bits are set in the fixup range.
134 //
135 // name offset bits flags
136 {"FIXUP_LANAI_NONE", 0, 32, 0},
137 {"FIXUP_LANAI_21", 16, 16 /*21*/, 0},
138 {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0},
139 {"FIXUP_LANAI_25", 7, 25, 0},
140 {"FIXUP_LANAI_32", 0, 32, 0},
141 {"FIXUP_LANAI_HI16", 16, 16, 0},
142 {"FIXUP_LANAI_LO16", 16, 16, 0}};
143
144 if (Kind < FirstTargetFixupKind)
146
147 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
148 "Invalid kind!");
149 return Infos[Kind - FirstTargetFixupKind];
150}
151
152} // namespace
153
155 const MCSubtargetInfo &STI,
156 const MCRegisterInfo & /*MRI*/,
157 const MCTargetOptions & /*Options*/) {
158 const Triple &TT = STI.getTargetTriple();
159 if (!TT.isOSBinFormatELF())
160 llvm_unreachable("OS not supported");
161
162 return new LanaiAsmBackend(T, TT.getOS());
163}
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static unsigned adjustFixupValue(unsigned Kind, uint64_t Value)
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:42
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const =0
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const =0
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
This represents an "assembler immediate".
Definition: MCValue.h:36
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & write(unsigned char C)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:121
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
MCAsmBackend * createLanaiAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FirstTargetFixupKind
Definition: MCFixup.h:45
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
@ FK_Data_1
A one-byte fixup.
Definition: MCFixup.h:23
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
@ FK_Data_2
A two-byte fixup.
Definition: MCFixup.h:24
std::unique_ptr< MCObjectTargetWriter > createLanaiELFObjectWriter(uint8_t OSABI)
endianness
Definition: bit.h:70
Target independent information on a fixup kind.