LLVM 24.0.0git
MipsELFObjectWriter.cpp
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1//===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "MCTargetDesc/MipsFixupKinds.h"
10#include "MCTargetDesc/MipsMCAsmInfo.h"
11#include "MCTargetDesc/MipsMCTargetDesc.h"
12#include "llvm/ADT/STLExtras.h"
13#include "llvm/BinaryFormat/ELF.h"
14#include "llvm/MC/MCContext.h"
15#include "llvm/MC/MCELFObjectWriter.h"
16#include "llvm/MC/MCFixup.h"
17#include "llvm/MC/MCObjectWriter.h"
18#include "llvm/MC/MCSymbolELF.h"
19#include "llvm/MC/MCValue.h"
20#include "llvm/Support/Compiler.h"
21#include "llvm/Support/Debug.h"
22#include "llvm/Support/ErrorHandling.h"
23#include "llvm/Support/MathExtras.h"
24#include "llvm/Support/raw_ostream.h"
25#include <cassert>
26#include <cstdint>
27#include <iterator>
28#include <list>
29
30#define DEBUG_TYPE "mips-elf-object-writer"
31
32using namespace llvm;
33
34namespace {
35
36/// Holds additional information needed by the relocation ordering algorithm.
37struct MipsRelocationEntry {
38 const ELFRelocationEntry R; ///< The relocation.
39 bool Matched = false; ///< Is this relocation part of a match.
40
41 MipsRelocationEntry(const ELFRelocationEntry &R) : R(R) {}
42};
43
44class MipsELFObjectWriter : public MCELFObjectTargetWriter {
45public:
46 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64);
47
48 ~MipsELFObjectWriter() override = default;
49
50 unsigned getRelocType(const MCFixup &, const MCValue &,
51 bool IsPCRel) const override;
52 bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
53 void sortRelocs(std::vector<ELFRelocationEntry> &Relocs) override;
54};
55
56} // end anonymous namespace
57
58/// Determine the low relocation that matches the given relocation.
59/// If the relocation does not need a low relocation then the return value
60/// is ELF::R_MIPS_NONE.
61///
62/// The relocations that need a matching low part are
63/// R_(MIPS|MICROMIPS|MIPS16)_HI16 for all symbols and
64/// R_(MIPS|MICROMIPS|MIPS16)_GOT16 for local symbols only.
65static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc) {
66 unsigned Type = Reloc.Type;
67 if (Type == ELF::R_MIPS_HI16)
68 return ELF::R_MIPS_LO16;
69 if (Type == ELF::R_MICROMIPS_HI16)
70 return ELF::R_MICROMIPS_LO16;
71 if (Type == ELF::R_MIPS16_HI16)
72 return ELF::R_MIPS16_LO16;
73
74 if (Reloc.Symbol && Reloc.Symbol->getBinding() != ELF::STB_LOCAL)
75 return ELF::R_MIPS_NONE;
76
77 if (Type == ELF::R_MIPS_GOT16)
78 return ELF::R_MIPS_LO16;
79 if (Type == ELF::R_MICROMIPS_GOT16)
80 return ELF::R_MICROMIPS_LO16;
81 if (Type == ELF::R_MIPS16_GOT16)
82 return ELF::R_MIPS16_LO16;
83
84 return ELF::R_MIPS_NONE;
85}
86
87// Determine whether a relocation X is a low-part and matches the high-part R
88// perfectly by symbol and addend.
89static bool isMatchingReloc(unsigned MatchingType, const ELFRelocationEntry &R,
90 const ELFRelocationEntry &X) {
91 return X.Type == MatchingType && X.Symbol == R.Symbol && X.Addend == R.Addend;
92}
93
94MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI,
95 bool HasRelocationAddend, bool Is64)
96 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {}
97
98unsigned MipsELFObjectWriter::getRelocType(const MCFixup &Fixup,
99 const MCValue &Target,
100 bool IsPCRel) const {
101 // Determine the type of the relocation.
102 auto Kind = Fixup.getKind();
103 switch (Target.getSpecifier()) {
104 case Mips::S_DTPREL:
105 case Mips::S_DTPREL_HI:
106 case Mips::S_DTPREL_LO:
107 case Mips::S_TLSLDM:
108 case Mips::S_TLSGD:
109 case Mips::S_GOTTPREL:
110 case Mips::S_TPREL_HI:
111 case Mips::S_TPREL_LO:
112 if (auto *SA = const_cast<MCSymbol *>(Target.getAddSym()))
113 static_cast<MCSymbolELF *>(SA)->setType(ELF::STT_TLS);
114 break;
115 default:
116 break;
117 }
118
119 switch (Kind) {
120 case FK_NONE:
121 return ELF::R_MIPS_NONE;
122 case FK_Data_1:
123 reportError(Fixup.getLoc(), "MIPS does not support one byte relocations");
124 return ELF::R_MIPS_NONE;
125 case Mips::fixup_Mips_16:
126 case FK_Data_2:
127 return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16;
128 case Mips::fixup_Mips_32:
129 case FK_Data_4:
130 return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32;
131 case Mips::fixup_Mips_64:
132 case FK_Data_8:
133 return IsPCRel
134 ? setRTypes(ELF::R_MIPS_PC32, ELF::R_MIPS_64, ELF::R_MIPS_NONE)
135 : (unsigned)ELF::R_MIPS_64;
136 }
137
138 if (IsPCRel) {
139 switch (Kind) {
140 case Mips::fixup_Mips_Branch_PCRel:
141 case Mips::fixup_Mips_PC16:
142 return ELF::R_MIPS_PC16;
143 case Mips::fixup_MICROMIPS_PC7_S1:
144 return ELF::R_MICROMIPS_PC7_S1;
145 case Mips::fixup_MICROMIPS_PC10_S1:
146 return ELF::R_MICROMIPS_PC10_S1;
147 case Mips::fixup_MICROMIPS_PC16_S1:
148 return ELF::R_MICROMIPS_PC16_S1;
149 case Mips::fixup_MICROMIPS_PC26_S1:
150 return ELF::R_MICROMIPS_PC26_S1;
151 case Mips::fixup_MICROMIPS_PC19_S2:
152 return ELF::R_MICROMIPS_PC19_S2;
153 case Mips::fixup_MICROMIPS_PC18_S3:
154 return ELF::R_MICROMIPS_PC18_S3;
155 case Mips::fixup_MICROMIPS_PC21_S1:
156 return ELF::R_MICROMIPS_PC21_S1;
157 case Mips::fixup_MIPS_PC19_S2:
158 return ELF::R_MIPS_PC19_S2;
159 case Mips::fixup_MIPS_PC18_S3:
160 return ELF::R_MIPS_PC18_S3;
161 case Mips::fixup_MIPS_PC21_S2:
162 return ELF::R_MIPS_PC21_S2;
163 case Mips::fixup_MIPS_PC26_S2:
164 return ELF::R_MIPS_PC26_S2;
165 case Mips::fixup_MIPS_PCHI16:
166 return ELF::R_MIPS_PCHI16;
167 case Mips::fixup_MIPS_PCLO16:
168 return ELF::R_MIPS_PCLO16;
169 }
170
171 llvm_unreachable("invalid PC-relative fixup kind!");
172 }
173
174 switch (Kind) {
175 case Mips::fixup_Mips_DTPREL32:
176 return ELF::R_MIPS_TLS_DTPREL32;
177 case Mips::fixup_Mips_DTPREL64:
178 return ELF::R_MIPS_TLS_DTPREL64;
179 case Mips::fixup_Mips_TPREL32:
180 return ELF::R_MIPS_TLS_TPREL32;
181 case Mips::fixup_Mips_TPREL64:
182 return ELF::R_MIPS_TLS_TPREL64;
183 case Mips::fixup_Mips_GPREL32:
184 return setRTypes(ELF::R_MIPS_GPREL32,
185 is64Bit() ? ELF::R_MIPS_64 : ELF::R_MIPS_NONE,
186 ELF::R_MIPS_NONE);
187 case Mips::fixup_Mips_GPREL16:
188 return ELF::R_MIPS_GPREL16;
189 case Mips::fixup_Mips_26:
190 return ELF::R_MIPS_26;
191 case Mips::fixup_Mips_CALL16:
192 return ELF::R_MIPS_CALL16;
193 case Mips::fixup_Mips_GOT:
194 return ELF::R_MIPS_GOT16;
195 case Mips::fixup_Mips_HI16:
196 return ELF::R_MIPS_HI16;
197 case Mips::fixup_Mips_LO16:
198 return ELF::R_MIPS_LO16;
199 case Mips::fixup_Mips_TLSGD:
200 return ELF::R_MIPS_TLS_GD;
201 case Mips::fixup_Mips_GOTTPREL:
202 return ELF::R_MIPS_TLS_GOTTPREL;
203 case Mips::fixup_Mips_TPREL_HI:
204 return ELF::R_MIPS_TLS_TPREL_HI16;
205 case Mips::fixup_Mips_TPREL_LO:
206 return ELF::R_MIPS_TLS_TPREL_LO16;
207 case Mips::fixup_Mips_TLSLDM:
208 return ELF::R_MIPS_TLS_LDM;
209 case Mips::fixup_Mips_DTPREL_HI:
210 return ELF::R_MIPS_TLS_DTPREL_HI16;
211 case Mips::fixup_Mips_DTPREL_LO:
212 return ELF::R_MIPS_TLS_DTPREL_LO16;
213 case Mips::fixup_Mips_GOT_PAGE:
214 return ELF::R_MIPS_GOT_PAGE;
215 case Mips::fixup_Mips_GOT_OFST:
216 return ELF::R_MIPS_GOT_OFST;
217 case Mips::fixup_Mips_GOT_DISP:
218 return ELF::R_MIPS_GOT_DISP;
219 case Mips::fixup_Mips_GPOFF_HI:
220 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_HI16);
221 case Mips::fixup_MICROMIPS_GPOFF_HI:
222 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB,
223 ELF::R_MICROMIPS_HI16);
224 case Mips::fixup_Mips_GPOFF_LO:
225 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_LO16);
226 case Mips::fixup_MICROMIPS_GPOFF_LO:
227 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB,
228 ELF::R_MICROMIPS_LO16);
229 case Mips::fixup_Mips_HIGHER:
230 return ELF::R_MIPS_HIGHER;
231 case Mips::fixup_Mips_HIGHEST:
232 return ELF::R_MIPS_HIGHEST;
233 case Mips::fixup_Mips_SUB:
234 return ELF::R_MIPS_SUB;
235 case Mips::fixup_Mips_GOT_HI16:
236 return ELF::R_MIPS_GOT_HI16;
237 case Mips::fixup_Mips_GOT_LO16:
238 return ELF::R_MIPS_GOT_LO16;
239 case Mips::fixup_Mips_CALL_HI16:
240 return ELF::R_MIPS_CALL_HI16;
241 case Mips::fixup_Mips_CALL_LO16:
242 return ELF::R_MIPS_CALL_LO16;
243 case Mips::fixup_MICROMIPS_26_S1:
244 return ELF::R_MICROMIPS_26_S1;
245 case Mips::fixup_MICROMIPS_HI16:
246 return ELF::R_MICROMIPS_HI16;
247 case Mips::fixup_MICROMIPS_LO16:
248 return ELF::R_MICROMIPS_LO16;
249 case Mips::fixup_MICROMIPS_GOT16:
250 return ELF::R_MICROMIPS_GOT16;
251 case Mips::fixup_MICROMIPS_CALL16:
252 return ELF::R_MICROMIPS_CALL16;
253 case Mips::fixup_MICROMIPS_GOT_DISP:
254 return ELF::R_MICROMIPS_GOT_DISP;
255 case Mips::fixup_MICROMIPS_GOT_PAGE:
256 return ELF::R_MICROMIPS_GOT_PAGE;
257 case Mips::fixup_MICROMIPS_GOT_OFST:
258 return ELF::R_MICROMIPS_GOT_OFST;
259 case Mips::fixup_MICROMIPS_TLS_GD:
260 return ELF::R_MICROMIPS_TLS_GD;
261 case Mips::fixup_MICROMIPS_TLS_LDM:
262 return ELF::R_MICROMIPS_TLS_LDM;
263 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
264 return ELF::R_MICROMIPS_TLS_DTPREL_HI16;
265 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
266 return ELF::R_MICROMIPS_TLS_DTPREL_LO16;
267 case Mips::fixup_MICROMIPS_GOTTPREL:
268 return ELF::R_MICROMIPS_TLS_GOTTPREL;
269 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
270 return ELF::R_MICROMIPS_TLS_TPREL_HI16;
271 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
272 return ELF::R_MICROMIPS_TLS_TPREL_LO16;
273 case Mips::fixup_MICROMIPS_SUB:
274 return ELF::R_MICROMIPS_SUB;
275 case Mips::fixup_MICROMIPS_HIGHER:
276 return ELF::R_MICROMIPS_HIGHER;
277 case Mips::fixup_MICROMIPS_HIGHEST:
278 return ELF::R_MICROMIPS_HIGHEST;
279 case Mips::fixup_Mips_JALR:
280 return ELF::R_MIPS_JALR;
281 case Mips::fixup_MICROMIPS_JALR:
282 return ELF::R_MICROMIPS_JALR;
283 }
284
285 reportError(Fixup.getLoc(), "unsupported relocation type");
286 return ELF::R_MIPS_NONE;
287}
288
289/// Sort relocation table entries by offset except where another order is
290/// required by the MIPS ABI.
291///
292/// MIPS has a few relocations that have an AHL component in the expression used
293/// to evaluate them. This AHL component is an addend with the same number of
294/// bits as a symbol value but not all of our ABI's are able to supply a
295/// sufficiently sized addend in a single relocation.
296///
297/// The O32 ABI for example, uses REL relocations which store the addend in the
298/// section data. All the relocations with AHL components affect 16-bit fields
299/// so the addend for a single relocation is limited to 16-bit. This ABI
300/// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and
301/// R_MIPS_LO16) and distributing the addend between the linked relocations. The
302/// ABI mandates that such relocations must be next to each other in a
303/// particular order (e.g. R_MIPS_HI16 must be immediately followed by a
304/// matching R_MIPS_LO16) but the rule is less strict in practice.
305///
306/// The de facto standard is lenient in the following ways:
307/// - 'Immediately following' does not refer to the next relocation entry but
308/// the next matching relocation.
309/// - There may be multiple high parts relocations for one low part relocation.
310/// - There may be multiple low part relocations for one high part relocation.
311/// - The AHL addend in each part does not have to be exactly equal as long as
312/// the difference does not affect the carry bit from bit 15 into 16. This is
313/// to allow, for example, the use of %lo(foo) and %lo(foo+4) when loading
314/// both halves of a long long.
315///
316/// See getMatchingLoType() for a description of which high part relocations
317/// match which low part relocations. One particular thing to note is that
318/// R_MIPS_GOT16 and similar only have AHL addends if they refer to local
319/// symbols.
320///
321/// It should also be noted that this function is not affected by whether
322/// the symbol was kept or rewritten into a section-relative equivalent. We
323/// always match using the expressions from the source.
324void MipsELFObjectWriter::sortRelocs(std::vector<ELFRelocationEntry> &Relocs) {
325 // We do not need to sort the relocation table for RELA relocations which
326 // N32/N64 uses as the relocation addend contains the value we require,
327 // rather than it being split across a pair of relocations.
328 if (hasRelocationAddend())
329 return;
330
331 // Sort relocations by r_offset. There might be more than one at an offset
332 // with composed relocations or .reloc directives.
333 llvm::stable_sort(
334 Relocs, [](const ELFRelocationEntry &A, const ELFRelocationEntry &B) {
335 return A.Offset < B.Offset;
336 });
337
338 // Place relocations in a list for reorder convenience. Hi16 contains the
339 // iterators of high-part relocations.
340 std::list<MipsRelocationEntry> Sorted;
341 SmallVector<std::list<MipsRelocationEntry>::iterator, 0> Hi16;
342 for (auto &R : Relocs) {
343 Sorted.push_back(R);
344 if (getMatchingLoType(R) != ELF::R_MIPS_NONE)
345 Hi16.push_back(std::prev(Sorted.end()));
346 }
347
348 for (auto I : Hi16) {
349 auto &R = I->R;
350 unsigned MatchingType = getMatchingLoType(R);
351 // If the next relocation is a perfect match, continue;
352 if (std::next(I) != Sorted.end() &&
353 isMatchingReloc(MatchingType, R, std::next(I)->R))
354 continue;
355 // Otherwise, find the best matching low-part relocation with the following
356 // criteria. It must have the same symbol and its addend is no lower than
357 // that of the current high-part.
358 //
359 // (1) %lo with a smaller offset is preferred.
360 // (2) %lo with the same offset that is unmatched is preferred.
361 // (3) later %lo is preferred.
362 auto Best = Sorted.end();
363 for (auto J = Sorted.begin(); J != Sorted.end(); ++J) {
364 auto &R1 = J->R;
365 if (R1.Type == MatchingType && R.Symbol == R1.Symbol &&
366 R.Addend <= R1.Addend &&
367 (Best == Sorted.end() || R1.Addend < Best->R.Addend ||
368 (!Best->Matched && R1.Addend == Best->R.Addend)))
369 Best = J;
370 }
371 if (Best != Sorted.end() && R.Addend == Best->R.Addend)
372 Best->Matched = true;
373
374 // Move the high-part before the low-part, or if not found, the end of the
375 // list. The unmatched high-part will lead to a linker warning/error.
376 Sorted.splice(Best, Sorted, I);
377 }
378
379 assert(Relocs.size() == Sorted.size() && "Some relocs were not consumed");
380
381 // Overwrite the original vector with the sorted elements.
382 unsigned CopyTo = 0;
383 for (const auto &R : Sorted)
384 Relocs[CopyTo++] = R.R;
385}
386
387bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCValue &V,
388 unsigned Type) const {
389 // If it's a compound relocation for N64 then we need the relocation if any
390 // sub-relocation needs it.
391 if (!isUInt<8>(Type))
392 return needsRelocateWithSymbol(V, Type & 0xff) ||
393 needsRelocateWithSymbol(V, (Type >> 8) & 0xff) ||
394 needsRelocateWithSymbol(V, (Type >> 16) & 0xff);
395
396 auto *Sym = static_cast<const MCSymbolELF *>(V.getAddSym());
397 switch (Type) {
398 default:
399 errs() << Type << "\n";
400 llvm_unreachable("Unexpected relocation");
401 return true;
402
403 // This relocation doesn't affect the section data.
404 case ELF::R_MIPS_NONE:
405 return false;
406
407 // On REL ABI's (e.g. O32), these relocations form pairs. The pairing is done
408 // by the static linker by matching the symbol and offset.
409 // We only see one relocation at a time but it's still safe to relocate with
410 // the section so long as both relocations make the same decision.
411 //
412 // Some older linkers may require the symbol for particular cases. Such cases
413 // are not supported yet but can be added as required.
414 case ELF::R_MIPS_GOT16:
415 case ELF::R_MIPS16_GOT16:
416 case ELF::R_MICROMIPS_GOT16:
417 case ELF::R_MIPS_HIGHER:
418 case ELF::R_MIPS_HIGHEST:
419 case ELF::R_MIPS_HI16:
420 case ELF::R_MIPS16_HI16:
421 case ELF::R_MICROMIPS_HI16:
422 case ELF::R_MIPS_LO16:
423 case ELF::R_MIPS16_LO16:
424 case ELF::R_MICROMIPS_LO16:
425 // FIXME: It should be safe to return false for the STO_MIPS_MICROMIPS but
426 // we neglect to handle the adjustment to the LSB of the addend that
427 // it causes in applyFixup() and similar.
428 if (Sym->getOther() & ELF::STO_MIPS_MICROMIPS)
429 return true;
430 return false;
431
432 case ELF::R_MIPS_GOT_PAGE:
433 case ELF::R_MICROMIPS_GOT_PAGE:
434 case ELF::R_MIPS_GOT_OFST:
435 case ELF::R_MICROMIPS_GOT_OFST:
436 case ELF::R_MIPS_16:
437 case ELF::R_MIPS_32:
438 case ELF::R_MIPS_GPREL32:
439 if (Sym->getOther() & ELF::STO_MIPS_MICROMIPS)
440 return true;
441 [[fallthrough]];
442 case ELF::R_MIPS_26:
443 case ELF::R_MIPS_64:
444 case ELF::R_MIPS_GPREL16:
445 case ELF::R_MIPS_PC16:
446 case ELF::R_MIPS_SUB:
447 return false;
448
449 // FIXME: Many of these relocations should probably return false but this
450 // hasn't been confirmed to be safe yet.
451 case ELF::R_MIPS_REL32:
452 case ELF::R_MIPS_LITERAL:
453 case ELF::R_MIPS_CALL16:
454 case ELF::R_MIPS_SHIFT5:
455 case ELF::R_MIPS_SHIFT6:
456 case ELF::R_MIPS_GOT_DISP:
457 case ELF::R_MIPS_GOT_HI16:
458 case ELF::R_MIPS_GOT_LO16:
459 case ELF::R_MIPS_INSERT_A:
460 case ELF::R_MIPS_INSERT_B:
461 case ELF::R_MIPS_DELETE:
462 case ELF::R_MIPS_CALL_HI16:
463 case ELF::R_MIPS_CALL_LO16:
464 case ELF::R_MIPS_SCN_DISP:
465 case ELF::R_MIPS_REL16:
466 case ELF::R_MIPS_ADD_IMMEDIATE:
467 case ELF::R_MIPS_PJUMP:
468 case ELF::R_MIPS_RELGOT:
469 case ELF::R_MIPS_JALR:
470 case ELF::R_MIPS_TLS_DTPMOD32:
471 case ELF::R_MIPS_TLS_DTPREL32:
472 case ELF::R_MIPS_TLS_DTPMOD64:
473 case ELF::R_MIPS_TLS_DTPREL64:
474 case ELF::R_MIPS_TLS_GD:
475 case ELF::R_MIPS_TLS_LDM:
476 case ELF::R_MIPS_TLS_DTPREL_HI16:
477 case ELF::R_MIPS_TLS_DTPREL_LO16:
478 case ELF::R_MIPS_TLS_GOTTPREL:
479 case ELF::R_MIPS_TLS_TPREL32:
480 case ELF::R_MIPS_TLS_TPREL64:
481 case ELF::R_MIPS_TLS_TPREL_HI16:
482 case ELF::R_MIPS_TLS_TPREL_LO16:
483 case ELF::R_MIPS_GLOB_DAT:
484 case ELF::R_MIPS_PC21_S2:
485 case ELF::R_MIPS_PC26_S2:
486 case ELF::R_MIPS_PC18_S3:
487 case ELF::R_MIPS_PC19_S2:
488 case ELF::R_MIPS_PCHI16:
489 case ELF::R_MIPS_PCLO16:
490 case ELF::R_MIPS_COPY:
491 case ELF::R_MIPS_JUMP_SLOT:
492 case ELF::R_MIPS_NUM:
493 case ELF::R_MIPS_PC32:
494 case ELF::R_MIPS_EH:
495 case ELF::R_MICROMIPS_26_S1:
496 case ELF::R_MICROMIPS_GPREL16:
497 case ELF::R_MICROMIPS_LITERAL:
498 case ELF::R_MICROMIPS_PC7_S1:
499 case ELF::R_MICROMIPS_PC10_S1:
500 case ELF::R_MICROMIPS_PC16_S1:
501 case ELF::R_MICROMIPS_CALL16:
502 case ELF::R_MICROMIPS_GOT_DISP:
503 case ELF::R_MICROMIPS_GOT_HI16:
504 case ELF::R_MICROMIPS_GOT_LO16:
505 case ELF::R_MICROMIPS_SUB:
506 case ELF::R_MICROMIPS_HIGHER:
507 case ELF::R_MICROMIPS_HIGHEST:
508 case ELF::R_MICROMIPS_CALL_HI16:
509 case ELF::R_MICROMIPS_CALL_LO16:
510 case ELF::R_MICROMIPS_SCN_DISP:
511 case ELF::R_MICROMIPS_JALR:
512 case ELF::R_MICROMIPS_HI0_LO16:
513 case ELF::R_MICROMIPS_TLS_GD:
514 case ELF::R_MICROMIPS_TLS_LDM:
515 case ELF::R_MICROMIPS_TLS_DTPREL_HI16:
516 case ELF::R_MICROMIPS_TLS_DTPREL_LO16:
517 case ELF::R_MICROMIPS_TLS_GOTTPREL:
518 case ELF::R_MICROMIPS_TLS_TPREL_HI16:
519 case ELF::R_MICROMIPS_TLS_TPREL_LO16:
520 case ELF::R_MICROMIPS_GPREL7_S2:
521 case ELF::R_MICROMIPS_PC23_S2:
522 case ELF::R_MICROMIPS_PC21_S1:
523 case ELF::R_MICROMIPS_PC26_S1:
524 case ELF::R_MICROMIPS_PC18_S3:
525 case ELF::R_MICROMIPS_PC19_S2:
526 return true;
527
528 // FIXME: Many of these should probably return false but MIPS16 isn't
529 // supported by the integrated assembler.
530 case ELF::R_MIPS16_26:
531 case ELF::R_MIPS16_GPREL:
532 case ELF::R_MIPS16_CALL16:
533 case ELF::R_MIPS16_TLS_GD:
534 case ELF::R_MIPS16_TLS_LDM:
535 case ELF::R_MIPS16_TLS_DTPREL_HI16:
536 case ELF::R_MIPS16_TLS_DTPREL_LO16:
537 case ELF::R_MIPS16_TLS_GOTTPREL:
538 case ELF::R_MIPS16_TLS_TPREL_HI16:
539 case ELF::R_MIPS16_TLS_TPREL_LO16:
540 llvm_unreachable("Unsupported MIPS16 relocation");
541 return true;
542 }
543}
544
545std::unique_ptr<MCObjectTargetWriter>
546llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) {
547 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
548 bool IsN64 = TT.isArch64Bit() && !IsN32;
549 bool HasRelocationAddend = TT.isArch64Bit();
550 return std::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend,
551 IsN64);
552}
assert
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
X
#define X(NUM, ENUM, NAME)
Definition ELF.h:665
reportError
static Error reportError(StringRef Message)
Definition BitcodeAnalyzer.cpp:20
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
I
#define I(x, y, z)
Definition MD5.cpp:57
isMatchingReloc
static bool isMatchingReloc(unsigned MatchingType, const ELFRelocationEntry &R, const ELFRelocationEntry &X)
Definition MipsELFObjectWriter.cpp:89
getMatchingLoType
static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc)
Determine the low relocation that matches the given relocation.
Definition MipsELFObjectWriter.cpp:65
STLExtras.h
This file contains some templates that are useful if you are working with the STL at all.
is64Bit
static bool is64Bit(const char *name)
Definition X86Disassembler.cpp:1067
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition MCFixup.h:65
llvm::Target
Target - Wrapper for Target specific information.
Definition TargetRegistry.h:138
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
uint8_t
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::ELF::STO_MIPS_MICROMIPS
@ STO_MIPS_MICROMIPS
Definition ELF.h:410
llvm::ELF::STB_LOCAL
@ STB_LOCAL
Definition ELF.h:1229
llvm::ELF::STT_TLS
@ STT_TLS
Definition ELF.h:1247
llvm::Mips::fixup_MICROMIPS_TLS_TPREL_LO16
@ fixup_MICROMIPS_TLS_TPREL_LO16
Definition MipsFixupKinds.h:221
llvm::Mips::fixup_MICROMIPS_TLS_TPREL_HI16
@ fixup_MICROMIPS_TLS_TPREL_HI16
Definition MipsFixupKinds.h:218
llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_HI16
@ fixup_MICROMIPS_TLS_DTPREL_HI16
Definition MipsFixupKinds.h:209
llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_LO16
@ fixup_MICROMIPS_TLS_DTPREL_LO16
Definition MipsFixupKinds.h:212
llvm::Mips::fixup_Mips_Branch_PCRel
@ fixup_Mips_Branch_PCRel
Definition MipsFixupKinds.h:98
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition DefaultTargetInfo.h:21
llvm::stable_sort
void stable_sort(R &&Range)
Definition STLExtras.h:2132
llvm::createMipsELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)
Construct a Mips ELF object writer.
Definition MipsELFObjectWriter.cpp:546
llvm::isUInt
constexpr bool isUInt(uint64_t x)
Checks if an unsigned integer fits into the given bit width.
Definition MathExtras.h:190
llvm::errs
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
Definition raw_ostream.cpp:890
llvm::FK_Data_8
@ FK_Data_8
A eight-byte fixup.
Definition MCFixup.h:41
llvm::FK_Data_1
@ FK_Data_1
A one-byte fixup.
Definition MCFixup.h:38
llvm::FK_Data_4
@ FK_Data_4
A four-byte fixup.
Definition MCFixup.h:40
llvm::FK_NONE
@ FK_NONE
A no-op fixup.
Definition MCFixup.h:37
llvm::FK_Data_2
@ FK_Data_2
A two-byte fixup.
Definition MCFixup.h:39
raw_ostream.h
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