llvm::Mips Namespace Reference

Typedefs
using	Specifier = uint16_t

Enumerations
enum	AFL_REG { AFL_REG_NONE = 0x00 , AFL_REG_32 = 0x01 , AFL_REG_64 = 0x02 , AFL_REG_128 = 0x03 }
enum	AFL_ASE {   AFL_ASE_DSP = 0x00000001 , AFL_ASE_DSPR2 = 0x00000002 , AFL_ASE_EVA = 0x00000004 , AFL_ASE_MCU = 0x00000008 ,   AFL_ASE_MDMX = 0x00000010 , AFL_ASE_MIPS3D = 0x00000020 , AFL_ASE_MT = 0x00000040 , AFL_ASE_SMARTMIPS = 0x00000080 ,   AFL_ASE_VIRT = 0x00000100 , AFL_ASE_MSA = 0x00000200 , AFL_ASE_MIPS16 = 0x00000400 , AFL_ASE_MICROMIPS = 0x00000800 ,   AFL_ASE_XPA = 0x00001000 , AFL_ASE_CRC = 0x00008000 , AFL_ASE_GINV = 0x00020000 }
enum	AFL_EXT {   AFL_EXT_NONE = 0 , AFL_EXT_XLR = 1 , AFL_EXT_OCTEON2 = 2 , AFL_EXT_OCTEONP = 3 ,   AFL_EXT_LOONGSON_3A = 4 , AFL_EXT_OCTEON = 5 , AFL_EXT_5900 = 6 , AFL_EXT_4650 = 7 ,   AFL_EXT_4010 = 8 , AFL_EXT_4100 = 9 , AFL_EXT_3900 = 10 , AFL_EXT_10000 = 11 ,   AFL_EXT_SB1 = 12 , AFL_EXT_4111 = 13 , AFL_EXT_4120 = 14 , AFL_EXT_5400 = 15 ,   AFL_EXT_5500 = 16 , AFL_EXT_LOONGSON_2E = 17 , AFL_EXT_LOONGSON_2F = 18 , AFL_EXT_OCTEON3 = 19 }
enum	AFL_FLAGS1 { AFL_FLAGS1_ODDSPREG = 1 }
enum	{ Tag_GNU_MIPS_ABI_FP = 4 , Tag_GNU_MIPS_ABI_MSA = 8 }
enum	Val_GNU_MIPS_ABI_FP {   Val_GNU_MIPS_ABI_FP_ANY = 0 , Val_GNU_MIPS_ABI_FP_DOUBLE = 1 , Val_GNU_MIPS_ABI_FP_SINGLE = 2 , Val_GNU_MIPS_ABI_FP_SOFT = 3 ,   Val_GNU_MIPS_ABI_FP_OLD_64 = 4 , Val_GNU_MIPS_ABI_FP_XX = 5 , Val_GNU_MIPS_ABI_FP_64 = 6 , Val_GNU_MIPS_ABI_FP_64A = 7 }
enum	Val_GNU_MIPS_ABI_MSA { Val_GNU_MIPS_ABI_MSA_ANY = 0 , Val_GNU_MIPS_ABI_MSA_128 = 1 }
enum	Fixups {   fixup_Mips_16 = FirstTargetFixupKind , fixup_Mips_32 , fixup_Mips_REL32 , fixup_Mips_GPREL32 ,   fixup_Mips_DTPREL32 , fixup_Mips_DTPREL64 , fixup_Mips_TPREL32 , fixup_Mips_TPREL64 ,   fixup_Mips_26 , fixup_Mips_HI16 , fixup_Mips_LO16 , fixup_Mips_AnyImm16 ,   fixup_Mips_GPREL16 , fixup_Mips_LITERAL , fixup_Mips_GOT , fixup_Mips_PC16 ,   fixup_Mips_CALL16 , fixup_Mips_SHIFT5 , fixup_Mips_SHIFT6 , fixup_Mips_64 ,   fixup_Mips_TLSGD , fixup_Mips_GOTTPREL , fixup_Mips_TPREL_HI , fixup_Mips_TPREL_LO ,   fixup_Mips_TLSLDM , fixup_Mips_DTPREL_HI , fixup_Mips_DTPREL_LO , fixup_Mips_Branch_PCRel ,   fixup_Mips_GPOFF_HI , fixup_MICROMIPS_GPOFF_HI , fixup_Mips_GPOFF_LO , fixup_MICROMIPS_GPOFF_LO ,   fixup_Mips_GOT_PAGE , fixup_Mips_GOT_OFST , fixup_Mips_GOT_DISP , fixup_Mips_HIGHER ,   fixup_MICROMIPS_HIGHER , fixup_Mips_HIGHEST , fixup_MICROMIPS_HIGHEST , fixup_Mips_GOT_HI16 ,   fixup_Mips_GOT_LO16 , fixup_Mips_CALL_HI16 , fixup_Mips_CALL_LO16 , fixup_MIPS_PC18_S3 ,   fixup_MIPS_PC19_S2 , fixup_MIPS_PC21_S2 , fixup_MIPS_PC26_S2 , fixup_MIPS_PCHI16 ,   fixup_MIPS_PCLO16 , fixup_MICROMIPS_26_S1 , fixup_MICROMIPS_HI16 , fixup_MICROMIPS_LO16 ,   fixup_MICROMIPS_GOT16 , fixup_MICROMIPS_PC7_S1 , fixup_MICROMIPS_PC10_S1 , fixup_MICROMIPS_PC16_S1 ,   fixup_MICROMIPS_PC26_S1 , fixup_MICROMIPS_PC19_S2 , fixup_MICROMIPS_PC18_S3 , fixup_MICROMIPS_PC21_S1 ,   fixup_MICROMIPS_CALL16 , fixup_MICROMIPS_GOT_DISP , fixup_MICROMIPS_GOT_PAGE , fixup_MICROMIPS_GOT_OFST ,   fixup_MICROMIPS_TLS_GD , fixup_MICROMIPS_TLS_LDM , fixup_MICROMIPS_TLS_DTPREL_HI16 , fixup_MICROMIPS_TLS_DTPREL_LO16 ,   fixup_MICROMIPS_GOTTPREL , fixup_MICROMIPS_TLS_TPREL_HI16 , fixup_MICROMIPS_TLS_TPREL_LO16 , fixup_Mips_SUB ,   fixup_MICROMIPS_SUB , fixup_Mips_JALR , fixup_MICROMIPS_JALR , LastTargetFixupKind ,   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind }
enum	FPBranchCode {   BRANCH_F , BRANCH_T , BRANCH_FL , BRANCH_TL ,   BRANCH_INVALID }
enum	CondCode {   FCOND_F , FCOND_UN , FCOND_OEQ , FCOND_UEQ ,   FCOND_OLT , FCOND_ULT , FCOND_OLE , FCOND_ULE ,   FCOND_SF , FCOND_NGLE , FCOND_SEQ , FCOND_NGL ,   FCOND_LT , FCOND_NGE , FCOND_LE , FCOND_NGT ,   FCOND_T , FCOND_OR , FCOND_UNE , FCOND_ONE ,   FCOND_UGE , FCOND_OGE , FCOND_UGT , FCOND_OGT ,   FCOND_ST , FCOND_GLE , FCOND_SNE , FCOND_GL ,   FCOND_NLT , FCOND_GE , FCOND_NLE , FCOND_GT }
enum	{   S_None , S_CALL_HI16 = FirstTargetFixupKind , S_CALL_LO16 , S_DTPREL ,   S_DTPREL_HI , S_DTPREL_LO , S_GOT , S_GOTTPREL ,   S_GOT_CALL , S_GOT_DISP , S_GOT_HI16 , S_GOT_LO16 ,   S_GOT_OFST , S_GOT_PAGE , S_GPREL , S_HI ,   S_HIGHER , S_HIGHEST , S_LO , S_NEG ,   S_PCREL_HI16 , S_PCREL_LO16 , S_TLSGD , S_TLSLDM ,   S_TPREL_HI , S_TPREL_LO , S_Special }
enum	FClassMask {   FClassMaskSignalingNaN = 1 << 0 , FClassMaskQuietNaN = 1 << 1 , FClassMaskNegativeInfinity = 1 << 2 , FClassMaskNegativeNormal = 1 << 3 ,   FClassMaskNegativeSubnormal = 1 << 4 , FClassMaskNegativeZero = 1 << 5 , FClassMaskPositiveInfinity = 1 << 6 , FClassMaskPositiveNormal = 1 << 7 ,   FClassMaskPositiveSubnormal = 1 << 8 , FClassMaskPositiveZero = 1 << 9 }
enum	PartialMappingIdx {   PMI_GPR32 , PMI_GPR64 , PMI_SPR , PMI_DPR ,   PMI_MSA , PMI_Min = PMI_GPR32 }
enum	ValueMappingIdx {   InvalidIdx = 0 , GPR32Idx = 1 , GPR64Idx = 4 , SPRIdx = 7 ,   DPRIdx = 10 , MSAIdx = 13 }

Functions
const char *	MipsFCCToString (Mips::CondCode CC)
bool	isGpOff (const MCSpecifierExpr &E)
const MCSpecifierExpr *	createGpOff (const MCExpr *Expr, Specifier S, MCContext &Ctx)
FastISel *	createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo, const LibcallLoweringInfo *libcallLowering)

Variables
constexpr MCPhysReg	GP = R28
constexpr MCPhysReg	SP = R29
constexpr MCPhysReg	FP = R30
constexpr MCPhysReg	RA = R31
constexpr MCPhysReg	GP_64 = R28_64
constexpr MCPhysReg	SP_64 = R29_64
constexpr MCPhysReg	FP_64 = R30_64
constexpr MCPhysReg	RA_64 = R31_64
const RegisterBankInfo::PartialMapping	PartMappings []
const RegisterBankInfo::ValueMapping	ValueMappings []

Typedef Documentation

Specifier

using llvm::Mips::Specifier = uint16_t

Definition at line 47 of file MipsMCAsmInfo.h.

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
S_None
S_CALL_HI16
S_CALL_LO16
S_DTPREL
S_DTPREL_HI
S_DTPREL_LO
S_GOT
S_GOTTPREL
S_GOT_CALL
S_GOT_DISP
S_GOT_HI16
S_GOT_LO16
S_GOT_OFST
S_GOT_PAGE
S_GPREL
S_HI
S_HIGHER
S_HIGHEST
S_LO
S_NEG
S_PCREL_HI16
S_PCREL_LO16
S_TLSGD
S_TLSLDM
S_TPREL_HI
S_TPREL_LO
S_Special

Definition at line 48 of file MipsMCAsmInfo.h.

anonymous enum

anonymous enum

Enumerator
Tag_GNU_MIPS_ABI_FP
Tag_GNU_MIPS_ABI_MSA

Definition at line 77 of file MipsABIFlags.h.

AFL_ASE

enum llvm::Mips::AFL_ASE

Enumerator
AFL_ASE_DSP
AFL_ASE_DSPR2
AFL_ASE_EVA
AFL_ASE_MCU
AFL_ASE_MDMX
AFL_ASE_MIPS3D
AFL_ASE_MT
AFL_ASE_SMARTMIPS
AFL_ASE_VIRT
AFL_ASE_MSA
AFL_ASE_MIPS16
AFL_ASE_MICROMIPS
AFL_ASE_XPA
AFL_ASE_CRC
AFL_ASE_GINV

Definition at line 31 of file MipsABIFlags.h.

AFL_EXT

enum llvm::Mips::AFL_EXT

Enumerator
AFL_EXT_NONE
AFL_EXT_XLR
AFL_EXT_OCTEON2
AFL_EXT_OCTEONP
AFL_EXT_LOONGSON_3A
AFL_EXT_OCTEON
AFL_EXT_5900
AFL_EXT_4650
AFL_EXT_4010
AFL_EXT_4100
AFL_EXT_3900
AFL_EXT_10000
AFL_EXT_SB1
AFL_EXT_4111
AFL_EXT_4120
AFL_EXT_5400
AFL_EXT_5500
AFL_EXT_LOONGSON_2E
AFL_EXT_LOONGSON_2F
AFL_EXT_OCTEON3

Definition at line 50 of file MipsABIFlags.h.

AFL_FLAGS1

enum llvm::Mips::AFL_FLAGS1

Enumerator
AFL_FLAGS1_ODDSPREG

Definition at line 74 of file MipsABIFlags.h.

AFL_REG

enum llvm::Mips::AFL_REG

Enumerator
AFL_REG_NONE
AFL_REG_32
AFL_REG_64
AFL_REG_128

Definition at line 23 of file MipsABIFlags.h.

CondCode

enum llvm::Mips::CondCode

Enumerator
FCOND_F
FCOND_UN
FCOND_OEQ
FCOND_UEQ
FCOND_OLT
FCOND_ULT
FCOND_OLE
FCOND_ULE
FCOND_SF
FCOND_NGLE
FCOND_SEQ
FCOND_NGL
FCOND_LT
FCOND_NGE
FCOND_LE
FCOND_NGT
FCOND_T
FCOND_OR
FCOND_UNE
FCOND_ONE
FCOND_UGE
FCOND_OGE
FCOND_UGT
FCOND_OGT
FCOND_ST
FCOND_GLE
FCOND_SNE
FCOND_GL
FCOND_NLT
FCOND_GE
FCOND_NLE
FCOND_GT

Definition at line 33 of file MipsInstPrinter.h.

FClassMask

enum llvm::Mips::FClassMask

Enumerator
FClassMaskSignalingNaN
FClassMaskQuietNaN
FClassMaskNegativeInfinity
FClassMaskNegativeNormal
FClassMaskNegativeSubnormal
FClassMaskNegativeZero
FClassMaskPositiveInfinity
FClassMaskPositiveNormal
FClassMaskPositiveSubnormal
FClassMaskPositiveZero

Definition at line 229 of file MipsInstrInfo.h.

Fixups

enum llvm::Mips::Fixups

Enumerator
fixup_Mips_16
fixup_Mips_32
fixup_Mips_REL32
fixup_Mips_GPREL32
fixup_Mips_DTPREL32
fixup_Mips_DTPREL64
fixup_Mips_TPREL32
fixup_Mips_TPREL64
fixup_Mips_26
fixup_Mips_HI16
fixup_Mips_LO16
fixup_Mips_AnyImm16
fixup_Mips_GPREL16
fixup_Mips_LITERAL
fixup_Mips_GOT
fixup_Mips_PC16
fixup_Mips_CALL16
fixup_Mips_SHIFT5
fixup_Mips_SHIFT6
fixup_Mips_64
fixup_Mips_TLSGD
fixup_Mips_GOTTPREL
fixup_Mips_TPREL_HI
fixup_Mips_TPREL_LO
fixup_Mips_TLSLDM
fixup_Mips_DTPREL_HI
fixup_Mips_DTPREL_LO
fixup_Mips_Branch_PCRel
fixup_Mips_GPOFF_HI
fixup_MICROMIPS_GPOFF_HI
fixup_Mips_GPOFF_LO
fixup_MICROMIPS_GPOFF_LO
fixup_Mips_GOT_PAGE
fixup_Mips_GOT_OFST
fixup_Mips_GOT_DISP
fixup_Mips_HIGHER
fixup_MICROMIPS_HIGHER
fixup_Mips_HIGHEST
fixup_MICROMIPS_HIGHEST
fixup_Mips_GOT_HI16
fixup_Mips_GOT_LO16
fixup_Mips_CALL_HI16
fixup_Mips_CALL_LO16
fixup_MIPS_PC18_S3
fixup_MIPS_PC19_S2
fixup_MIPS_PC21_S2
fixup_MIPS_PC26_S2
fixup_MIPS_PCHI16
fixup_MIPS_PCLO16
fixup_MICROMIPS_26_S1
fixup_MICROMIPS_HI16
fixup_MICROMIPS_LO16
fixup_MICROMIPS_GOT16
fixup_MICROMIPS_PC7_S1
fixup_MICROMIPS_PC10_S1
fixup_MICROMIPS_PC16_S1
fixup_MICROMIPS_PC26_S1
fixup_MICROMIPS_PC19_S2
fixup_MICROMIPS_PC18_S3
fixup_MICROMIPS_PC21_S1
fixup_MICROMIPS_CALL16
fixup_MICROMIPS_GOT_DISP
fixup_MICROMIPS_GOT_PAGE
fixup_MICROMIPS_GOT_OFST
fixup_MICROMIPS_TLS_GD
fixup_MICROMIPS_TLS_LDM
fixup_MICROMIPS_TLS_DTPREL_HI16
fixup_MICROMIPS_TLS_DTPREL_LO16
fixup_MICROMIPS_GOTTPREL
fixup_MICROMIPS_TLS_TPREL_HI16
fixup_MICROMIPS_TLS_TPREL_LO16
fixup_Mips_SUB
fixup_MICROMIPS_SUB
fixup_Mips_JALR
fixup_MICROMIPS_JALR
LastTargetFixupKind
NumTargetFixupKinds

Definition at line 24 of file MipsFixupKinds.h.

FPBranchCode

enum llvm::Mips::FPBranchCode

Enumerator
BRANCH_F
BRANCH_T
BRANCH_FL
BRANCH_TL
BRANCH_INVALID

Definition at line 24 of file MipsInstPrinter.h.

PartialMappingIdx

enum llvm::Mips::PartialMappingIdx

Enumerator
PMI_GPR32
PMI_GPR64
PMI_SPR
PMI_DPR
PMI_MSA
PMI_Min

Definition at line 27 of file MipsRegisterBankInfo.cpp.

Val_GNU_MIPS_ABI_FP

enum llvm::Mips::Val_GNU_MIPS_ABI_FP

Enumerator
Val_GNU_MIPS_ABI_FP_ANY
Val_GNU_MIPS_ABI_FP_DOUBLE
Val_GNU_MIPS_ABI_FP_SINGLE
Val_GNU_MIPS_ABI_FP_SOFT
Val_GNU_MIPS_ABI_FP_OLD_64
Val_GNU_MIPS_ABI_FP_XX
Val_GNU_MIPS_ABI_FP_64
Val_GNU_MIPS_ABI_FP_64A

Definition at line 84 of file MipsABIFlags.h.

Val_GNU_MIPS_ABI_MSA

enum llvm::Mips::Val_GNU_MIPS_ABI_MSA

Enumerator
Val_GNU_MIPS_ABI_MSA_ANY
Val_GNU_MIPS_ABI_MSA_128

Definition at line 96 of file MipsABIFlags.h.

ValueMappingIdx

enum llvm::Mips::ValueMappingIdx

Enumerator
InvalidIdx
GPR32Idx
GPR64Idx
SPRIdx
DPRIdx
MSAIdx

Definition at line 42 of file MipsRegisterBankInfo.cpp.

Function Documentation

createFastISel()

FastISel * llvm::Mips::createFastISel	(	FunctionLoweringInfo &	funcInfo,
		const TargetLibraryInfo *	libInfo,
		const LibcallLoweringInfo *	libcallLowering )

Definition at line 2159 of file MipsFastISel.cpp.

Referenced by llvm::MipsTargetLowering::createFastISel().

createGpOff()

const MCSpecifierExpr * llvm::Mips::createGpOff	(	const MCExpr *	Expr,
		Mips::Specifier	S,
		MCContext &	Ctx )

Definition at line 64 of file MipsMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), S_GPREL, and S_NEG.

Referenced by llvm::MipsTargetELFStreamer::emitDirectiveCpsetup().

isGpOff()

bool llvm::Mips::isGpOff

(

const MCSpecifierExpr &

E

)

Definition at line 167 of file MipsMCAsmInfo.cpp.

References llvm::dyn_cast(), S1, S_GPREL, S_HI, S_LO, and S_NEG.

Referenced by evaluate(), and llvm::MipsMCCodeEmitter::getExprOpValue().

MipsFCCToString()

const char * llvm::Mips::MipsFCCToString

(

Mips::CondCode

CC

)

Definition at line 37 of file MipsInstPrinter.cpp.

References FCOND_F, FCOND_GE, FCOND_GL, FCOND_GLE, FCOND_GT, FCOND_LE, FCOND_LT, FCOND_NGE, FCOND_NGL, FCOND_NGLE, FCOND_NGT, FCOND_NLE, FCOND_NLT, FCOND_OEQ, FCOND_OGE, FCOND_OGT, FCOND_OLE, FCOND_OLT, FCOND_ONE, FCOND_OR, FCOND_SEQ, FCOND_SF, FCOND_SNE, FCOND_ST, FCOND_T, FCOND_UEQ, FCOND_UGE, FCOND_UGT, FCOND_ULE, FCOND_ULT, FCOND_UN, FCOND_UNE, and llvm_unreachable.

Referenced by llvm::MipsAsmPrinter::printFCCOperand().

Variable Documentation

FP

MCPhysReg llvm::Mips::FP = R30

inlineconstexpr

Definition at line 88 of file MipsMCTargetDesc.h.

Referenced by llvm::MipsRegisterInfo::canRealignStack(), DecodeRegListOperand(), llvm::MIPS_MC::getCPURegisterIndex(), llvm::MipsABIInfo::GetFramePtr(), llvm::MipsRegisterInfo::getFrameRegister(), getRegisterForMxtrC0(), getRegisterForMxtrFP(), llvm::MipsRegisterInfo::getReservedRegs(), and llvm::MIPS_MC::initLLVMToCVRegMapping().

FP_64

MCPhysReg llvm::Mips::FP_64 = R30_64

inlineconstexpr

Definition at line 92 of file MipsMCTargetDesc.h.

Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::MipsABIInfo::GetFramePtr(), llvm::MipsRegisterInfo::getFrameRegister(), and llvm::MipsRegisterInfo::getReservedRegs().

GP

MCPhysReg llvm::Mips::GP = R28

inlineconstexpr

Definition at line 86 of file MipsMCTargetDesc.h.

Referenced by DecodeMemMMGPImm7Lsl2(), eraseGPOpnd(), llvm::MipsTargetLowering::getAddrGPRel(), llvm::MipsABIInfo::GetGlobalPtr(), llvm::MipsMCCodeEmitter::getMemEncodingMMGPImm7Lsl2(), llvm::MipsTargetLowering::getOpndList(), getRegisterForMxtrC0(), getRegisterForMxtrFP(), llvm::MipsRegisterInfo::getReservedRegs(), llvm::MIPS_MC::initLLVMToCVRegMapping(), and llvm::MipsCallLowering::lowerCall().

GP_64

MCPhysReg llvm::Mips::GP_64 = R28_64

inlineconstexpr

Definition at line 90 of file MipsMCTargetDesc.h.

Referenced by eraseGPOpnd(), llvm::MipsTargetLowering::getAddrGPRel(), llvm::MipsABIInfo::GetGlobalPtr(), llvm::MipsTargetLowering::getOpndList(), and llvm::MipsRegisterInfo::getReservedRegs().

PartMappings

const RegisterBankInfo::PartialMapping llvm::Mips::PartMappings[]

Initial value:

{{0, 32, GPRBRegBank},
                                                      {0, 64, GPRBRegBank},
                                                      {0, 32, FPRBRegBank},
                                                      {0, 64, FPRBRegBank},
                                                      {0, 128, FPRBRegBank}}

Definition at line 36 of file MipsRegisterBankInfo.cpp.

RA

MCPhysReg llvm::Mips::RA = R31

inlineconstexpr

Definition at line 89 of file MipsMCTargetDesc.h.

Referenced by CheckXWPInstr(), createMipsMCRegisterInfo(), DecodeRegListOperand(), DecodeRegListOperand16(), llvm::MipsSEFrameLowering::determineCalleeSaves(), getRegisterForMxtrC0(), getRegisterForMxtrFP(), llvm::MipsRegisterInfo::getReservedRegs(), llvm::MIPS_MC::initLLVMToCVRegMapping(), llvm::Mips16FrameLowering::spillCalleeSavedRegisters(), and llvm::MipsSEFrameLowering::spillCalleeSavedRegisters().

RA_64

MCPhysReg llvm::Mips::RA_64 = R31_64

inlineconstexpr

Definition at line 93 of file MipsMCTargetDesc.h.

Referenced by llvm::MipsSEFrameLowering::determineCalleeSaves(), llvm::MipsRegisterInfo::getReservedRegs(), and llvm::MipsSEFrameLowering::spillCalleeSavedRegisters().

SP

MCPhysReg llvm::Mips::SP = R29

inlineconstexpr

Definition at line 87 of file MipsMCTargetDesc.h.

Referenced by createMipsMCAsmInfo(), DecodeMemMMReglistImm4Lsl2(), DecodeMemMMSPImm5Lsl2(), llvm::MipsFrameLowering::eliminateCallFramePseudoInstr(), llvm::MipsTargetELFStreamer::emitDirectiveCpRestore(), llvm::MipsTargetELFStreamer::emitDirectiveCpreturn(), llvm::MipsTargetELFStreamer::emitDirectiveCpsetup(), llvm::Mips16FrameLowering::emitEpilogue(), llvm::MipsTargetStreamer::emitGPRestore(), llvm::Mips16FrameLowering::emitPrologue(), llvm::MipsRegisterInfo::getFrameRegister(), llvm::MipsMCCodeEmitter::getMemEncodingMMSPImm5Lsl2(), getRegisterForMxtrC0(), getRegisterForMxtrFP(), llvm::MipsRegisterInfo::getReservedRegs(), llvm::MipsABIInfo::GetStackPtr(), INITIALIZE_PASS(), llvm::MIPS_MC::initLLVMToCVRegMapping(), llvm::Mips16InstrInfo::loadImmediate(), llvm::MipsCallLowering::lowerCall(), llvm::MipsTargetLowering::MipsTargetLowering(), and llvm::Mips16InstrInfo::validImmediate().

SP_64

MCPhysReg llvm::Mips::SP_64 = R29_64

inlineconstexpr

Definition at line 91 of file MipsMCTargetDesc.h.

Referenced by llvm::MipsFrameLowering::eliminateCallFramePseudoInstr(), llvm::MipsRegisterInfo::getFrameRegister(), llvm::MipsMCCodeEmitter::getMemEncodingMMSPImm5Lsl2(), llvm::MipsRegisterInfo::getReservedRegs(), llvm::MipsABIInfo::GetStackPtr(), and llvm::MipsTargetLowering::MipsTargetLowering().

ValueMappings

const RegisterBankInfo::ValueMapping llvm::Mips::ValueMappings[]

Initial value:

= {
    
    {nullptr, 0},
    
    {&PartMappings[PMI_GPR32 - PMI_Min], 1},
    {&PartMappings[PMI_GPR32 - PMI_Min], 1},
    {&PartMappings[PMI_GPR32 - PMI_Min], 1},
    
    {&PartMappings[PMI_GPR64 - PMI_Min], 1},
    {&PartMappings[PMI_GPR64 - PMI_Min], 1},
    {&PartMappings[PMI_GPR64 - PMI_Min], 1},
    
    {&PartMappings[PMI_SPR - PMI_Min], 1},
    {&PartMappings[PMI_SPR - PMI_Min], 1},
    {&PartMappings[PMI_SPR - PMI_Min], 1},
    
    {&PartMappings[PMI_DPR - PMI_Min], 1},
    {&PartMappings[PMI_DPR - PMI_Min], 1},
    {&PartMappings[PMI_DPR - PMI_Min], 1},
    
    {&PartMappings[PMI_MSA - PMI_Min], 1},
    {&PartMappings[PMI_MSA - PMI_Min], 1},
    {&PartMappings[PMI_MSA - PMI_Min], 1}}

Definition at line 51 of file MipsRegisterBankInfo.cpp.

Referenced by getFprbMapping(), getGprbOrCustomMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), and getMSAMapping().