13#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
14#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
50 std::unique_ptr<MCAsmBackend> &&AB,
51 std::unique_ptr<MCObjectWriter> &&OW,
52 std::unique_ptr<MCCodeEmitter> &&CE);
55std::unique_ptr<MCObjectTargetWriter>
67 unsigned RegClassID,
unsigned AltIdx);
71 unsigned AltIdx,
bool *IsDeprecated =
nullptr);
78#define GET_REGINFO_ENUM
79#include "MipsGenRegisterInfo.inc"
82#define GET_INSTRINFO_ENUM
83#define GET_INSTRINFO_MC_HELPER_DECLS
84#include "MipsGenInstrInfo.inc"
86#define GET_SUBTARGETINFO_ENUM
87#include "MipsGenSubtargetInfo.inc"
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
Generic interface to target specific assembler backends.
MCCodeEmitter - Generic instruction encoding interface.
Context object for machine code objects.
Interface to description of machine instruction set.
Base class for classes that define behaviour that is specific to both the target and the object forma...
Defines the object file and target independent interfaces used by the assembler backend to write nati...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Streaming machine code generation interface.
Generic base class for all target subtargets.
Represent a constant reference to a string, i.e.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
MCRegister matchRegisterName(StringRef Name, const MCRegisterInfo &MRI, unsigned RegClassID, unsigned AltIdx)
Match a symbolic name in RegClassID, or return an invalid register.
void initLLVMToCVRegMapping(MCRegisterInfo *MRI)
int getCPURegisterIndex(StringRef Name, const MCRegisterInfo &MRI, unsigned AltIdx, bool *IsDeprecated=nullptr)
Return a GPR name's hardware index, or -1 if unknown.
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, MCContext &Ctx)
std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)
Construct a Mips ELF object writer.
MCStreamer * createMipsWinCOFFStreamer(MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&CE)
Construct an MIPS Windows COFF machine code streamer which will generate PE/COFF format object files.
std::unique_ptr< MCObjectTargetWriter > createMipsWinCOFFObjectWriter()
Construct a Mips Win COFF object writer.
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)