LLVM 24.0.0git
MipsMCTargetDesc.h
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1//===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides Mips specific target descriptions.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
14#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
15
17
18#include <memory>
19
20namespace llvm {
21class MCAsmBackend;
22class MCCodeEmitter;
23class MCContext;
24class MCInstrInfo;
26class MCObjectWriter;
27class MCRegister;
28class MCRegisterInfo;
29class MCStreamer;
30class MCSubtargetInfo;
31class MCTargetOptions;
32class StringRef;
33class Target;
34class Triple;
35
37 MCContext &Ctx);
39 MCContext &Ctx);
40
42 const MCRegisterInfo &MRI,
44
45/// Construct an MIPS Windows COFF machine code streamer which will generate
46/// PE/COFF format object files.
47///
48/// Takes ownership of \p AB and \p CE.
50 std::unique_ptr<MCAsmBackend> &&AB,
51 std::unique_ptr<MCObjectWriter> &&OW,
52 std::unique_ptr<MCCodeEmitter> &&CE);
53
54/// Construct a Mips ELF object writer.
55std::unique_ptr<MCObjectTargetWriter>
56createMipsELFObjectWriter(const Triple &TT, bool IsN32);
57/// Construct a Mips Win COFF object writer.
58std::unique_ptr<MCObjectTargetWriter> createMipsWinCOFFObjectWriter();
59
60namespace MIPS_MC {
62
64
65/// Match a symbolic name in RegClassID, or return an invalid register.
67 unsigned RegClassID, unsigned AltIdx);
68
69/// Return a GPR name's hardware index, or -1 if unknown.
71 unsigned AltIdx, bool *IsDeprecated = nullptr);
72}
73
74} // End llvm namespace
75
76// Defines symbolic names for Mips registers. This defines a mapping from
77// register name to register number.
78#define GET_REGINFO_ENUM
79#include "MipsGenRegisterInfo.inc"
80
81// Defines symbolic names for the Mips instructions.
82#define GET_INSTRINFO_ENUM
83#define GET_INSTRINFO_MC_HELPER_DECLS
84#include "MipsGenInstrInfo.inc"
85
86#define GET_SUBTARGETINFO_ENUM
87#include "MipsGenSubtargetInfo.inc"
88
89#endif
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static LVOptions Options
Definition LVOptions.cpp:25
#define T
Generic interface to target specific assembler backends.
MCCodeEmitter - Generic instruction encoding interface.
Context object for machine code objects.
Definition MCContext.h:83
Interface to description of machine instruction set.
Definition MCInstrInfo.h:27
Base class for classes that define behaviour that is specific to both the target and the object forma...
Defines the object file and target independent interfaces used by the assembler backend to write nati...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Definition MCRegister.h:41
Streaming machine code generation interface.
Definition MCStreamer.h:222
Generic base class for all target subtargets.
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
MCRegister matchRegisterName(StringRef Name, const MCRegisterInfo &MRI, unsigned RegClassID, unsigned AltIdx)
Match a symbolic name in RegClassID, or return an invalid register.
void initLLVMToCVRegMapping(MCRegisterInfo *MRI)
int getCPURegisterIndex(StringRef Name, const MCRegisterInfo &MRI, unsigned AltIdx, bool *IsDeprecated=nullptr)
Return a GPR name's hardware index, or -1 if unknown.
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, MCContext &Ctx)
std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)
Construct a Mips ELF object writer.
MCStreamer * createMipsWinCOFFStreamer(MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&CE)
Construct an MIPS Windows COFF machine code streamer which will generate PE/COFF format object files.
std::unique_ptr< MCObjectTargetWriter > createMipsWinCOFFObjectWriter()
Construct a Mips Win COFF object writer.
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)