42 unsigned Kind =
Fixup.getKind();
82 if (!isInt<16>(
Value)) {
92 if (!isInt<19>(
Value)) {
116 Value = ((
Value + 0x80008000LL) >> 32) & 0xffff;
121 Value = ((
Value + 0x800080008000LL) >> 48) & 0xffff;
131 if (!isInt<7>(
Value)) {
141 if (!isInt<10>(
Value)) {
151 if (!isInt<16>(
Value)) {
160 if (!isInt<18>(
Value)) {
173 if (!isInt<18>(
Value)) {
182 if (!isInt<21>(
Value)) {
191 if (!isInt<26>(
Value)) {
200 if (!isInt<26>(
Value)) {
209 if (!isInt<21>(
Value)) {
219std::unique_ptr<MCObjectTargetWriter>
236 assert(i <= 3 &&
"Index out of range!");
238 return (1 - i / 2) * 2 + i % 2;
263 switch ((
unsigned)Kind) {
284 for (
unsigned i = 0; i != NumBytes; ++i) {
287 : (FullSize - 1 - i);
293 CurVal |=
Value & Mask;
296 for (
unsigned i = 0; i != NumBytes; ++i) {
299 : (FullSize - 1 - i);
306 .
Case(
"BFD_RELOC_NONE", ELF::R_MIPS_NONE)
307 .
Case(
"BFD_RELOC_16", ELF::R_MIPS_16)
308 .
Case(
"BFD_RELOC_32", ELF::R_MIPS_32)
309 .
Case(
"BFD_RELOC_64", ELF::R_MIPS_64)
338 .Case(
"R_MICROMIPS_TLS_GOTTPREL",
340 .Case(
"R_MICROMIPS_TLS_DTPREL_HI16",
342 .Case(
"R_MICROMIPS_TLS_DTPREL_LO16",
346 .Case(
"R_MICROMIPS_TLS_TPREL_HI16",
348 .Case(
"R_MICROMIPS_TLS_TPREL_LO16",
362 {
"fixup_Mips_16", 0, 16, 0 },
363 {
"fixup_Mips_32", 0, 32, 0 },
364 {
"fixup_Mips_REL32", 0, 32, 0 },
365 {
"fixup_Mips_26", 0, 26, 0 },
366 {
"fixup_Mips_HI16", 0, 16, 0 },
367 {
"fixup_Mips_LO16", 0, 16, 0 },
368 {
"fixup_Mips_GPREL16", 0, 16, 0 },
369 {
"fixup_Mips_LITERAL", 0, 16, 0 },
370 {
"fixup_Mips_GOT", 0, 16, 0 },
372 {
"fixup_Mips_CALL16", 0, 16, 0 },
373 {
"fixup_Mips_GPREL32", 0, 32, 0 },
374 {
"fixup_Mips_SHIFT5", 6, 5, 0 },
375 {
"fixup_Mips_SHIFT6", 6, 5, 0 },
376 {
"fixup_Mips_64", 0, 64, 0 },
377 {
"fixup_Mips_TLSGD", 0, 16, 0 },
378 {
"fixup_Mips_GOTTPREL", 0, 16, 0 },
379 {
"fixup_Mips_TPREL_HI", 0, 16, 0 },
380 {
"fixup_Mips_TPREL_LO", 0, 16, 0 },
381 {
"fixup_Mips_TLSLDM", 0, 16, 0 },
382 {
"fixup_Mips_DTPREL_HI", 0, 16, 0 },
383 {
"fixup_Mips_DTPREL_LO", 0, 16, 0 },
385 {
"fixup_Mips_GPOFF_HI", 0, 16, 0 },
386 {
"fixup_MICROMIPS_GPOFF_HI",0, 16, 0 },
387 {
"fixup_Mips_GPOFF_LO", 0, 16, 0 },
388 {
"fixup_MICROMIPS_GPOFF_LO",0, 16, 0 },
389 {
"fixup_Mips_GOT_PAGE", 0, 16, 0 },
390 {
"fixup_Mips_GOT_OFST", 0, 16, 0 },
391 {
"fixup_Mips_GOT_DISP", 0, 16, 0 },
392 {
"fixup_Mips_HIGHER", 0, 16, 0 },
393 {
"fixup_MICROMIPS_HIGHER", 0, 16, 0 },
394 {
"fixup_Mips_HIGHEST", 0, 16, 0 },
395 {
"fixup_MICROMIPS_HIGHEST", 0, 16, 0 },
396 {
"fixup_Mips_GOT_HI16", 0, 16, 0 },
397 {
"fixup_Mips_GOT_LO16", 0, 16, 0 },
398 {
"fixup_Mips_CALL_HI16", 0, 16, 0 },
399 {
"fixup_Mips_CALL_LO16", 0, 16, 0 },
406 {
"fixup_MICROMIPS_26_S1", 0, 26, 0 },
407 {
"fixup_MICROMIPS_HI16", 0, 16, 0 },
408 {
"fixup_MICROMIPS_LO16", 0, 16, 0 },
409 {
"fixup_MICROMIPS_GOT16", 0, 16, 0 },
417 {
"fixup_MICROMIPS_CALL16", 0, 16, 0 },
418 {
"fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
419 {
"fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
420 {
"fixup_MICROMIPS_GOT_OFST", 0, 16, 0 },
421 {
"fixup_MICROMIPS_TLS_GD", 0, 16, 0 },
422 {
"fixup_MICROMIPS_TLS_LDM", 0, 16, 0 },
423 {
"fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 },
424 {
"fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 },
425 {
"fixup_MICROMIPS_GOTTPREL", 0, 16, 0 },
426 {
"fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 },
427 {
"fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 },
428 {
"fixup_Mips_SUB", 0, 64, 0 },
429 {
"fixup_MICROMIPS_SUB", 0, 64, 0 },
430 {
"fixup_Mips_JALR", 0, 32, 0 },
431 {
"fixup_MICROMIPS_JALR", 0, 32, 0 }
434 "Not all MIPS little endian fixup kinds added!");
441 {
"fixup_Mips_16", 16, 16, 0 },
442 {
"fixup_Mips_32", 0, 32, 0 },
443 {
"fixup_Mips_REL32", 0, 32, 0 },
444 {
"fixup_Mips_26", 6, 26, 0 },
445 {
"fixup_Mips_HI16", 16, 16, 0 },
446 {
"fixup_Mips_LO16", 16, 16, 0 },
447 {
"fixup_Mips_GPREL16", 16, 16, 0 },
448 {
"fixup_Mips_LITERAL", 16, 16, 0 },
449 {
"fixup_Mips_GOT", 16, 16, 0 },
451 {
"fixup_Mips_CALL16", 16, 16, 0 },
452 {
"fixup_Mips_GPREL32", 0, 32, 0 },
453 {
"fixup_Mips_SHIFT5", 21, 5, 0 },
454 {
"fixup_Mips_SHIFT6", 21, 5, 0 },
455 {
"fixup_Mips_64", 0, 64, 0 },
456 {
"fixup_Mips_TLSGD", 16, 16, 0 },
457 {
"fixup_Mips_GOTTPREL", 16, 16, 0 },
458 {
"fixup_Mips_TPREL_HI", 16, 16, 0 },
459 {
"fixup_Mips_TPREL_LO", 16, 16, 0 },
460 {
"fixup_Mips_TLSLDM", 16, 16, 0 },
461 {
"fixup_Mips_DTPREL_HI", 16, 16, 0 },
462 {
"fixup_Mips_DTPREL_LO", 16, 16, 0 },
464 {
"fixup_Mips_GPOFF_HI", 16, 16, 0 },
465 {
"fixup_MICROMIPS_GPOFF_HI", 16, 16, 0 },
466 {
"fixup_Mips_GPOFF_LO", 16, 16, 0 },
467 {
"fixup_MICROMIPS_GPOFF_LO", 16, 16, 0 },
468 {
"fixup_Mips_GOT_PAGE", 16, 16, 0 },
469 {
"fixup_Mips_GOT_OFST", 16, 16, 0 },
470 {
"fixup_Mips_GOT_DISP", 16, 16, 0 },
471 {
"fixup_Mips_HIGHER", 16, 16, 0 },
472 {
"fixup_MICROMIPS_HIGHER", 16, 16, 0 },
473 {
"fixup_Mips_HIGHEST", 16, 16, 0 },
474 {
"fixup_MICROMIPS_HIGHEST",16, 16, 0 },
475 {
"fixup_Mips_GOT_HI16", 16, 16, 0 },
476 {
"fixup_Mips_GOT_LO16", 16, 16, 0 },
477 {
"fixup_Mips_CALL_HI16", 16, 16, 0 },
478 {
"fixup_Mips_CALL_LO16", 16, 16, 0 },
485 {
"fixup_MICROMIPS_26_S1", 6, 26, 0 },
486 {
"fixup_MICROMIPS_HI16", 16, 16, 0 },
487 {
"fixup_MICROMIPS_LO16", 16, 16, 0 },
488 {
"fixup_MICROMIPS_GOT16", 16, 16, 0 },
496 {
"fixup_MICROMIPS_CALL16", 16, 16, 0 },
497 {
"fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
498 {
"fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
499 {
"fixup_MICROMIPS_GOT_OFST", 16, 16, 0 },
500 {
"fixup_MICROMIPS_TLS_GD", 16, 16, 0 },
501 {
"fixup_MICROMIPS_TLS_LDM", 16, 16, 0 },
502 {
"fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 },
503 {
"fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 },
504 {
"fixup_MICROMIPS_GOTTPREL", 16, 16, 0 },
505 {
"fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 },
506 {
"fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 },
507 {
"fixup_Mips_SUB", 0, 64, 0 },
508 {
"fixup_MICROMIPS_SUB", 0, 64, 0 },
509 {
"fixup_Mips_JALR", 0, 32, 0 },
510 {
"fixup_MICROMIPS_JALR", 0, 32, 0 }
513 "Not all MIPS big endian fixup kinds added!");
552 const unsigned FixupKind =
Fixup.getKind();
593 if (
const auto *ElfSym = dyn_cast<const MCSymbolELF>(
Sym)) {
unsigned const MachineRegisterInfo * MRI
static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, MCContext &Ctx)
static unsigned calculateMMLEIndex(unsigned i)
static bool needsMMLEByteOrder(unsigned Kind)
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
Generic interface to target specific assembler backends.
const llvm::endianness Endian
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual std::optional< MCFixupKind > getFixupKind(StringRef Name) const
Map a relocation name used in .reloc to a fixup kind.
Context object for machine code objects.
void reportError(SMLoc L, const Twine &Msg)
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
This represents an "assembler immediate".
static MipsABIInfo computeTargetABI(const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const MCSubtargetInfo *STI) override
Hook to check if a relocation is needed for some target specific reason.
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
WriteNopData - Write an (optimal) nop sequence of Count bytes to the given output.
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
ApplyFixup - Apply the Value for given Fixup into the provided data fragment, at the offset specified...
std::optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
bool isMicroMips(const MCSymbol *Sym) const override
Check whether a given symbol has been flagged with MICROMIPS flag.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
StringRef - Represent a constant reference to a string, i.e.
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
Target - Wrapper for Target specific information.
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & write_zeros(unsigned NumZeros)
write_zeros - Insert 'NumZeros' nulls.
@ fixup_MICROMIPS_TLS_TPREL_LO16
@ fixup_MICROMIPS_GOT_PAGE
@ fixup_MICROMIPS_PC16_S1
@ fixup_MICROMIPS_TLS_TPREL_HI16
@ fixup_MICROMIPS_PC21_S1
@ fixup_MICROMIPS_GPOFF_LO
@ fixup_MICROMIPS_PC19_S2
@ fixup_MICROMIPS_TLS_LDM
@ fixup_MICROMIPS_GOT_OFST
@ fixup_MICROMIPS_TLS_DTPREL_HI16
@ fixup_MICROMIPS_PC10_S1
@ fixup_MICROMIPS_HIGHEST
@ fixup_MICROMIPS_GOT_DISP
@ fixup_MICROMIPS_PC18_S3
@ fixup_MICROMIPS_PC26_S1
@ fixup_MICROMIPS_GOTTPREL
@ fixup_MICROMIPS_TLS_DTPREL_LO16
@ fixup_MICROMIPS_GPOFF_HI
This is an optimization pass for GlobalISel generic memory operations.
std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_DTPRel_4
A four-byte dtp relative fixup.
@ FK_DTPRel_8
A eight-byte dtp relative fixup.
@ FK_TPRel_4
A four-byte tp relative fixup.
@ FK_GPRel_4
A four-byte gp relative fixup.
@ FK_TPRel_8
A eight-byte tp relative fixup.
@ FK_Data_2
A two-byte fixup.
@ Default
The result values are uniform if and only if all operands are uniform.
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Target independent information on a fixup kind.
@ FKF_IsPCRel
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
unsigned TargetSize
The number of bits written by this fixup.