LLVM 20.0.0git
NVPTXTargetMachine.h
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1//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the NVPTX specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
14#define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
15
16#include "NVPTXSubtarget.h"
18#include <optional>
19#include <utility>
20
21namespace llvm {
22
23/// NVPTXTargetMachine
24///
26 bool is64bit;
27 std::unique_ptr<TargetLoweringObjectFile> TLOF;
28 NVPTX::DrvInterface drvInterface;
29 NVPTXSubtarget Subtarget;
30
31 // Hold Strings that can be free'd all together with NVPTXTargetMachine
32 BumpPtrAllocator StrAlloc;
33 UniqueStringSaver StrPool;
34
35public:
36 NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
38 std::optional<Reloc::Model> RM,
39 std::optional<CodeModel::Model> CM, CodeGenOptLevel OP,
40 bool is64bit);
42 const NVPTXSubtarget *getSubtargetImpl(const Function &) const override {
43 return &Subtarget;
44 }
45 const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget; }
46 bool is64Bit() const { return is64bit; }
47 NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
49 return const_cast<UniqueStringSaver &>(StrPool);
50 }
51
53
54 // Emission of machine code through MCJIT is not supported.
56 bool = true) override {
57 return true;
58 }
60 return TLOF.get();
61 }
62
65 const TargetSubtargetInfo *STI) const override;
66
67 void registerDefaultAliasAnalyses(AAManager &AAM) override;
68
70
72
73 bool isMachineVerifierClean() const override {
74 return false;
75 }
76
77 std::pair<const Value *, unsigned>
78 getPredicatedAddrSpace(const Value *V) const override;
79}; // NVPTXTargetMachine.
80
82 virtual void anchor();
83
84public:
85 NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
87 std::optional<Reloc::Model> RM,
88 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
89 bool JIT);
90};
91
93 virtual void anchor();
94
95public:
96 NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
98 std::optional<Reloc::Model> RM,
99 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
100 bool JIT);
101};
102
103} // end namespace llvm
104
105#endif
#define F(x, y, z)
Definition: MD5.cpp:55
PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)
Basic Register Allocator
#define OP(OPC)
Definition: SandboxIR.h:650
A manager for alias analyses.
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Context object for machine code objects.
Definition: MCContext.h:83
TargetLoweringObjectFile * getObjFileLowering() const override
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
void registerDefaultAliasAnalyses(AAManager &AAM) override
Allow the target to register alias analyses with the AAManager for use with the new pass manager.
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
If the specified predicate checks whether a generic pointer falls within a specified address space,...
void registerPassBuilderCallbacks(PassBuilder &PB) override
Allow the target to modify the pass pipeline.
const NVPTXSubtarget * getSubtargetImpl() const
bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &, bool=true) override
Add passes to the specified pass manager to get machine code emitted with the MCJIT.
~NVPTXTargetMachine() override
NVPTX::DrvInterface getDrvInterface() const
bool isMachineVerifierClean() const override
Returns true if the target is expected to pass all machine verifier checks.
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
const NVPTXSubtarget * getSubtargetImpl(const Function &) const override
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
UniqueStringSaver & getStrPool() const
This class provides access to building LLVM's passes.
Definition: PassBuilder.h:106
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
Target-Independent Code Generator Pass Configuration Options.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
Saves strings in the provided stable storage and returns a StringRef with a stable character pointer.
Definition: StringSaver.h:44
LLVM Value Representation.
Definition: Value.h:74
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:434
DrvInterface
Definition: NVPTX.h:74
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...