LLVM 20.0.0git
SystemZInstPrinterCommon.cpp
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1//=- SystemZInstPrinterCommon.cpp - Common SystemZ MCInst to assembly funcs -=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
10#include "llvm/MC/MCExpr.h"
11#include "llvm/MC/MCInst.h"
12#include "llvm/MC/MCRegister.h"
13#include "llvm/MC/MCSymbol.h"
18#include <cassert>
19#include <cstdint>
20
21using namespace llvm;
22
23#define DEBUG_TYPE "asm-printer"
24
27 const MCOperand &DispMO,
28 MCRegister Index, raw_ostream &O) {
29 printOperand(DispMO, MAI, O);
30 if (Base || Index) {
31 O << '(';
32 if (Index) {
33 printRegName(O, Index);
34 O << ',';
35 }
36 if (Base)
38 else
39 O << '0';
40 O << ')';
41 }
42}
43
45 const MCAsmInfo *MAI,
46 raw_ostream &O) {
47 if (MO.isReg()) {
48 if (!MO.getReg())
49 O << '0';
50 else
51 printRegName(O, MO.getReg());
52 } else if (MO.isImm())
54 else if (MO.isExpr())
55 MO.getExpr()->print(O, MAI);
56 else
57 llvm_unreachable("Invalid operand");
58}
59
61 printFormattedRegName(&MAI, Reg, O);
62}
63
64template <unsigned N>
66 raw_ostream &O) {
67 const MCOperand &MO = MI->getOperand(OpNum);
68 if (MO.isExpr()) {
69 O << *MO.getExpr();
70 return;
71 }
72 uint64_t Value = static_cast<uint64_t>(MO.getImm());
73 assert(isUInt<N>(Value) && "Invalid uimm argument");
75}
76
77template <unsigned N>
79 raw_ostream &O) {
80 const MCOperand &MO = MI->getOperand(OpNum);
81 if (MO.isExpr()) {
82 O << *MO.getExpr();
83 return;
84 }
85 int64_t Value = MI->getOperand(OpNum).getImm();
86 assert(isInt<N>(Value) && "Invalid simm argument");
88}
89
91 raw_ostream &O) {
92 printUImmOperand<1>(MI, OpNum, O);
93}
94
96 raw_ostream &O) {
97 printUImmOperand<2>(MI, OpNum, O);
98}
99
101 raw_ostream &O) {
102 printUImmOperand<3>(MI, OpNum, O);
103}
104
106 raw_ostream &O) {
107 printUImmOperand<4>(MI, OpNum, O);
108}
109
111 raw_ostream &O) {
112 printSImmOperand<8>(MI, OpNum, O);
113}
114
116 raw_ostream &O) {
117 printUImmOperand<8>(MI, OpNum, O);
118}
119
121 raw_ostream &O) {
122 printUImmOperand<12>(MI, OpNum, O);
123}
124
126 raw_ostream &O) {
127 printSImmOperand<16>(MI, OpNum, O);
128}
129
131 raw_ostream &O) {
132 printUImmOperand<16>(MI, OpNum, O);
133}
134
136 raw_ostream &O) {
137 printSImmOperand<32>(MI, OpNum, O);
138}
139
141 raw_ostream &O) {
142 printUImmOperand<32>(MI, OpNum, O);
143}
144
146 raw_ostream &O) {
147 printUImmOperand<48>(MI, OpNum, O);
148}
149
151 raw_ostream &O) {
152 const MCOperand &MO = MI->getOperand(OpNum);
153 if (MO.isImm()) {
155 O << "0x";
156 O.write_hex(MO.getImm());
157 } else
158 MO.getExpr()->print(O, &MAI);
159}
160
162 uint64_t Address, int OpNum,
163 raw_ostream &O) {
164 // Output the PC-relative operand.
165 printPCRelOperand(MI, OpNum, O);
166
167 // Output the TLS marker if present.
168 if ((unsigned)OpNum + 1 < MI->getNumOperands()) {
169 const MCOperand &MO = MI->getOperand(OpNum + 1);
170 const MCSymbolRefExpr &refExp = cast<MCSymbolRefExpr>(*MO.getExpr());
171 switch (refExp.getKind()) {
173 O << ":tls_gdcall:";
174 break;
176 O << ":tls_ldcall:";
177 break;
178 default:
179 llvm_unreachable("Unexpected symbol kind");
180 }
181 O << refExp.getSymbol().getName();
182 }
183}
184
186 raw_ostream &O) {
187 printOperand(MI->getOperand(OpNum), &MAI, O);
188}
189
191 raw_ostream &O) {
192 printAddress(&MAI, MI->getOperand(OpNum).getReg(), MI->getOperand(OpNum + 1),
193 0, O);
194}
195
197 raw_ostream &O) {
198 printAddress(&MAI, MI->getOperand(OpNum).getReg(), MI->getOperand(OpNum + 1),
199 MI->getOperand(OpNum + 2).getReg(), O);
200}
201
203 raw_ostream &O) {
204 unsigned Base = MI->getOperand(OpNum).getReg();
205 const MCOperand &DispMO = MI->getOperand(OpNum + 1);
206 uint64_t Length = MI->getOperand(OpNum + 2).getImm();
207 printOperand(DispMO, &MAI, O);
208 O << '(' << Length;
209 if (Base) {
210 O << ",";
211 printRegName(O, Base);
212 }
213 O << ')';
214}
215
217 raw_ostream &O) {
218 unsigned Base = MI->getOperand(OpNum).getReg();
219 const MCOperand &DispMO = MI->getOperand(OpNum + 1);
220 unsigned Length = MI->getOperand(OpNum + 2).getReg();
221 printOperand(DispMO, &MAI, O);
222 O << "(";
224 if (Base) {
225 O << ",";
226 printRegName(O, Base);
227 }
228 O << ')';
229}
230
232 raw_ostream &O) {
233 printAddress(&MAI, MI->getOperand(OpNum).getReg(), MI->getOperand(OpNum + 1),
234 MI->getOperand(OpNum + 2).getReg(), O);
235}
236
238 raw_ostream &O) {
239 static const char *const CondNames[] = {"o", "h", "nle", "l", "nhe",
240 "lh", "ne", "e", "nlh", "he",
241 "nl", "le", "nh", "no"};
242 uint64_t Imm = MI->getOperand(OpNum).getImm();
243 assert(Imm > 0 && Imm < 15 && "Invalid condition");
244 O << CondNames[Imm - 1];
245}
IRTranslator LLVM IR MI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Definition: MCExpr.cpp:40
WithMarkup markup(raw_ostream &OS, Markup M)
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:52
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:185
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:37
int64_t getImm() const
Definition: MCInst.h:81
bool isImm() const
Definition: MCInst.h:63
bool isReg() const
Definition: MCInst.h:62
MCRegister getReg() const
Returns the register number.
Definition: MCInst.h:70
const MCExpr * getExpr() const
Definition: MCInst.h:115
bool isExpr() const
Definition: MCInst.h:66
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
const MCSymbol & getSymbol() const
Definition: MCExpr.h:411
VariantKind getKind() const
Definition: MCExpr.h:413
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:205
void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printOperand(const MCOperand &MO, const MCAsmInfo *MAI, raw_ostream &O)
void printPCRelTLSOperand(const MCInst *MI, uint64_t Address, int OpNum, raw_ostream &O)
void printRegName(raw_ostream &O, MCRegister Reg) override
Print the assembler register name.
virtual void printFormattedRegName(const MCAsmInfo *MAI, MCRegister Reg, raw_ostream &O)
void printU12ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU48ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printAddress(const MCAsmInfo *MAI, MCRegister Base, const MCOperand &DispMO, MCRegister Index, raw_ostream &O)
void printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O)
void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Length
Definition: DWP.cpp:480