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| using | InstructionMappings = SmallVector< const InstructionMapping *, 4 > |
| | Convenient type to represent the alternatives for mapping an instruction.
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| const RegisterBank * | getRegBankFromConstraints (const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const MachineRegisterInfo &MRI) const |
| | Get the register bank for the OpIdx-th operand of MI form the encoding constraints, if any.
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| virtual void | applyMappingImpl (MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) const |
| | See applyMapping.
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| virtual | ~RegisterBankInfo ()=default |
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| const RegisterBank & | getRegBank (unsigned ID) const |
| | Get the register bank identified by ID.
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| unsigned | getMaximumSize (unsigned RegBankID) const |
| | Get the maximum size in bits that fits in the given register bank.
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| const RegisterBank * | getRegBank (Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) const |
| | Get the register bank of Reg.
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| unsigned | getNumRegBanks () const |
| | Get the total number of register banks.
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| virtual bool | isDivergentRegBank (const RegisterBank *RB) const |
| | Returns true if the register bank is considered divergent.
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| virtual const RegisterBank & | getRegBankFromRegClass (const TargetRegisterClass &RC, LLT Ty) const |
| | Get a register bank that covers RC.
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| virtual unsigned | copyCost (const RegisterBank &A, const RegisterBank &B, TypeSize Size) const |
| | Get the cost of a copy from B to A, or put differently, get the cost of A = COPY B.
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| bool | cannotCopy (const RegisterBank &Dst, const RegisterBank &Src, TypeSize Size) const |
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| virtual unsigned | getBreakDownCost (const ValueMapping &ValMapping, const RegisterBank *CurBank=nullptr) const |
| | Get the cost of using ValMapping to decompose a register.
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| virtual const InstructionMapping & | getInstrMapping (const MachineInstr &MI) const |
| | Get the mapping of the different operands of MI on the register bank.
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| virtual InstructionMappings | getInstrAlternativeMappings (const MachineInstr &MI) const |
| | Get the alternative mappings for MI.
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| InstructionMappings | getInstrPossibleMappings (const MachineInstr &MI) const |
| | Get the possible mapping for MI.
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| void | applyMapping (MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) const |
| | Apply OpdMapper.getInstrMapping() to OpdMapper.getMI().
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| TypeSize | getSizeInBits (Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) const |
| | Get the size in bits of Reg.
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| bool | verify (const TargetRegisterInfo &TRI) const |
| | Check that information hold by this instance make sense for the given TRI.
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| const InstructionMapping & | getInstructionMapping (unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands) const |
| | Method to get a uniquely generated InstructionMapping.
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| const InstructionMapping & | getInvalidInstructionMapping () const |
| | Method to get a uniquely generated invalid InstructionMapping.
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| static void | applyDefaultMapping (const OperandsMapper &OpdMapper) |
| | Helper method to apply something that is like the default mapping.
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| static const TargetRegisterClass * | constrainGenericRegister (Register Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI) |
| | Constrain the (possibly generic) virtual register Reg to RC.
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| static const unsigned | DefaultMappingID = UINT_MAX |
| | Identifier used when the related instruction mapping instance is generated by target independent code.
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| static const unsigned | InvalidMappingID = UINT_MAX - 1 |
| | Identifier used when the related instruction mapping instance is generated by the default constructor.
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| | RegisterBankInfo (const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode) |
| | Create a RegisterBankInfo that can accommodate up to NumRegBanks RegisterBank instances.
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| | RegisterBankInfo () |
| | This constructor is meaningless.
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| const RegisterBank & | getRegBank (unsigned ID) |
| | Get the register bank identified by ID.
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| const TargetRegisterClass * | getMinimalPhysRegClass (Register Reg, const TargetRegisterInfo &TRI) const |
| | Get the MinimalPhysRegClass for Reg.
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| const InstructionMapping & | getInstrMappingImpl (const MachineInstr &MI) const |
| | Try to get the mapping of MI.
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| const PartialMapping & | getPartialMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const |
| | Get the uniquely generated PartialMapping for the given arguments.
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| const ValueMapping & | getValueMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const |
| | The most common ValueMapping consists of a single PartialMapping.
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| const ValueMapping & | getValueMapping (const PartialMapping *BreakDown, unsigned NumBreakDowns) const |
| | Get the ValueMapping for the given arguments.
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| template<typename Iterator > |
| const ValueMapping * | getOperandsMapping (Iterator Begin, Iterator End) const |
| | Get the uniquely generated array of ValueMapping for the elements of between Begin and End.
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| const ValueMapping * | getOperandsMapping (const SmallVectorImpl< const ValueMapping * > &OpdsMapping) const |
| | Get the uniquely generated array of ValueMapping for the elements of OpdsMapping.
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| const ValueMapping * | getOperandsMapping (std::initializer_list< const ValueMapping * > OpdsMapping) const |
| | Get the uniquely generated array of ValueMapping for the given arguments.
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| const RegisterBank ** | RegBanks |
| | Hold the set of supported register banks.
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| unsigned | NumRegBanks |
| | Total number of register banks.
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| const unsigned * | Sizes |
| | Hold the sizes of the register banks for all HwModes.
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| unsigned | HwMode |
| | Current HwMode for the target.
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| DenseMap< hash_code, std::unique_ptr< const PartialMapping > > | MapOfPartialMappings |
| | Keep dynamically allocated PartialMapping in a separate map.
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| DenseMap< hash_code, std::unique_ptr< const ValueMapping > > | MapOfValueMappings |
| | Keep dynamically allocated ValueMapping in a separate map.
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| DenseMap< hash_code, std::unique_ptr< ValueMapping[]> > | MapOfOperandsMappings |
| | Keep dynamically allocated array of ValueMapping in a separate map.
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| DenseMap< hash_code, std::unique_ptr< const InstructionMapping > > | MapOfInstructionMappings |
| | Keep dynamically allocated InstructionMapping in a separate map.
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| DenseMap< unsigned, const TargetRegisterClass * > | PhysRegMinimalRCs |
| | Getting the minimal register class of a physreg is expensive.
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Definition at line 26 of file AArch64RegisterBankInfo.h.
Public Types inherited from llvm::RegisterBankInfo