LLVM 20.0.0git
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#include "Target/Sparc/SparcInstrInfo.h"
Public Member Functions | |
SparcInstrInfo (SparcSubtarget &ST) | |
const SparcRegisterInfo & | getRegisterInfo () const |
getRegisterInfo - TargetInstrInfo is a superset of MRegister info. | |
Register | isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. | |
Register | isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. | |
MachineBasicBlock * | getBranchDestBlock (const MachineInstr &MI) const override |
bool | analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override |
unsigned | removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override |
unsigned | insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override |
bool | reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
bool | isBranchOffsetInRange (unsigned BranchOpc, int64_t Offset) const override |
Determine if the branch target is in range. | |
void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override |
void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override |
void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override |
Register | getGlobalBaseReg (MachineFunction *MF) const |
unsigned | getInstSizeInBytes (const MachineInstr &MI) const override |
GetInstSize - Return the number of bytes of code the specified instruction may be. | |
bool | expandPostRAPseudo (MachineInstr &MI) const override |
Definition at line 38 of file SparcInstrInfo.h.
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explicit |
Definition at line 40 of file SparcInstrInfo.cpp.
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Definition at line 242 of file SparcInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), Cond, llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineBasicBlock::getLastNonDebugInstr(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, llvm::isCondBranchOpcode(), llvm::isIndirectBranchOpcode(), llvm::isUncondBranchOpcode(), MBB, parseCondBranch(), and TBB.
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Definition at line 436 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), assert(), llvm::BuildMI(), contains(), DL, llvm::get(), llvm::MachineInstrBuilder::getInstr(), llvm::getKillRegState(), getRegisterInfo(), I, llvm_unreachable, MBB, and TRI.
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Definition at line 644 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::get(), llvm::SparcSubtarget::is64Bit(), llvm::SparcSubtarget::isTargetLinux(), MI, and llvm::Offset.
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Definition at line 211 of file SparcInstrInfo.cpp.
References llvm_unreachable, and MI.
Register SparcInstrInfo::getGlobalBaseReg | ( | MachineFunction * | MF | ) | const |
Definition at line 605 of file SparcInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::front(), llvm::get(), llvm::SparcMachineFunctionInfo::getGlobalBaseReg(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::SparcSubtarget::is64Bit(), MBBI, and llvm::SparcMachineFunctionInfo::setGlobalBaseReg().
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GetInstSize - Return the number of bytes of code the specified instruction may be.
This returns the maximum number of bytes.
Definition at line 627 of file SparcInstrInfo.cpp.
References llvm::get(), llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), and MI.
Referenced by removeBranch().
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getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 49 of file SparcInstrInfo.h.
Referenced by copyPhysReg(), and llvm::SparcSubtarget::getRegisterInfo().
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Definition at line 325 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), CC, Cond, DL, llvm::get(), isRegCondBranchOpcode(), MBB, and TBB.
Determine if the branch target is in range.
Definition at line 399 of file SparcInstrInfo.cpp.
References assert(), BPccDisplacementBits, BPrDisplacementBits, llvm::isIntN(), llvm_unreachable, and llvm::Offset.
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isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 49 of file SparcInstrInfo.cpp.
References MI.
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isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 68 of file SparcInstrInfo.cpp.
References MI.
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Definition at line 566 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), I, llvm_unreachable, MBB, and llvm::MachineMemOperand::MOLoad.
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Definition at line 365 of file SparcInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), getInstSizeInBytes(), I, llvm::isCondBranchOpcode(), llvm::isUncondBranchOpcode(), and MBB.
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Definition at line 391 of file SparcInstrInfo.cpp.
References assert(), CC, Cond, and GetOppositeBranchCondition().
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Definition at line 526 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), I, llvm_unreachable, MBB, and llvm::MachineMemOperand::MOStore.