SparcInstrInfo.cpp File Reference

#include "SparcInstrInfo.h"
#include "Sparc.h"
#include "SparcMachineFunctionInfo.h"
#include "SparcSubtarget.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"
#include "SparcGenInstrInfo.inc"

Go to the source code of this file.

Macros
#define	GET_INSTRINFO_CTOR_DTOR

Functions
static SPCC::CondCodes	GetOppositeBranchCondition (SPCC::CondCodes CC)
static bool	isUncondBranchOpcode (int Opc)
static bool	isI32CondBranchOpcode (int Opc)
static bool	isI64CondBranchOpcode (int Opc)
static bool	isRegCondBranchOpcode (int Opc)
static bool	isFCondBranchOpcode (int Opc)
static bool	isCondBranchOpcode (int Opc)
static bool	isIndirectBranchOpcode (int Opc)
static void	parseCondBranch (MachineInstr *LastInst, MachineBasicBlock *&Target, SmallVectorImpl< MachineOperand > &Cond)

Variables
static cl::opt< unsigned >	BPccDisplacementBits ("sparc-bpcc-offset-bits", cl::Hidden, cl::init(19), cl::desc("Restrict range of BPcc/FBPfcc instructions (DEBUG)"))
static cl::opt< unsigned >	BPrDisplacementBits ("sparc-bpr-offset-bits", cl::Hidden, cl::init(16), cl::desc("Restrict range of BPr instructions (DEBUG)"))

Macro Definition Documentation

GET_INSTRINFO_CTOR_DTOR

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 28 of file SparcInstrInfo.cpp.

Function Documentation

GetOppositeBranchCondition()

static SPCC::CondCodes GetOppositeBranchCondition ( SPCC::CondCodes  CC )

static

Definition at line 84 of file SparcInstrInfo.cpp.

References CC, llvm::SPCC::CPCC_0, llvm::SPCC::CPCC_01, llvm::SPCC::CPCC_012, llvm::SPCC::CPCC_013, llvm::SPCC::CPCC_02, llvm::SPCC::CPCC_023, llvm::SPCC::CPCC_03, llvm::SPCC::CPCC_1, llvm::SPCC::CPCC_12, llvm::SPCC::CPCC_123, llvm::SPCC::CPCC_13, llvm::SPCC::CPCC_2, llvm::SPCC::CPCC_23, llvm::SPCC::CPCC_3, llvm::SPCC::CPCC_A, llvm::SPCC::CPCC_N, llvm::SPCC::FCC_A, llvm::SPCC::FCC_E, llvm::SPCC::FCC_G, llvm::SPCC::FCC_GE, llvm::SPCC::FCC_L, llvm::SPCC::FCC_LE, llvm::SPCC::FCC_LG, llvm::SPCC::FCC_N, llvm::SPCC::FCC_NE, llvm::SPCC::FCC_O, llvm::SPCC::FCC_U, llvm::SPCC::FCC_UE, llvm::SPCC::FCC_UG, llvm::SPCC::FCC_UGE, llvm::SPCC::FCC_UL, llvm::SPCC::FCC_ULE, llvm::SPCC::ICC_A, llvm::SPCC::ICC_CC, llvm::SPCC::ICC_CS, llvm::SPCC::ICC_E, llvm::SPCC::ICC_G, llvm::SPCC::ICC_GE, llvm::SPCC::ICC_GU, llvm::SPCC::ICC_L, llvm::SPCC::ICC_LE, llvm::SPCC::ICC_LEU, llvm::SPCC::ICC_N, llvm::SPCC::ICC_NE, llvm::SPCC::ICC_NEG, llvm::SPCC::ICC_POS, llvm::SPCC::ICC_VC, llvm::SPCC::ICC_VS, llvm_unreachable, llvm::SPCC::REG_BEGIN, llvm::SPCC::REG_GEZ, llvm::SPCC::REG_GZ, llvm::SPCC::REG_LEZ, llvm::SPCC::REG_LZ, llvm::SPCC::REG_NZ, and llvm::SPCC::REG_Z.

Referenced by llvm::M68kInstrInfo::AnalyzeBranchImpl(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::SparcInstrInfo::reverseBranchCondition(), llvm::VEInstrInfo::reverseBranchCondition(), llvm::X86InstrInfo::reverseBranchCondition(), and llvm::XCoreInstrInfo::reverseBranchCondition().

isCondBranchOpcode()

static bool isCondBranchOpcode ( int  Opc )

static

Definition at line 183 of file SparcInstrInfo.cpp.

References isFCondBranchOpcode(), isI32CondBranchOpcode(), isI64CondBranchOpcode(), and isRegCondBranchOpcode().

isFCondBranchOpcode()

static bool isFCondBranchOpcode ( int  Opc )

static

Definition at line 178 of file SparcInstrInfo.cpp.

Referenced by isCondBranchOpcode().

isI32CondBranchOpcode()

static bool isI32CondBranchOpcode ( int  Opc )

static

Definition at line 163 of file SparcInstrInfo.cpp.

Referenced by isCondBranchOpcode().

isI64CondBranchOpcode()

static bool isI64CondBranchOpcode ( int  Opc )

static

Definition at line 168 of file SparcInstrInfo.cpp.

Referenced by isCondBranchOpcode().

isIndirectBranchOpcode()

static bool isIndirectBranchOpcode ( int  Opc )

static

Definition at line 188 of file SparcInstrInfo.cpp.

isRegCondBranchOpcode()

static bool isRegCondBranchOpcode ( int  Opc )

static

Definition at line 173 of file SparcInstrInfo.cpp.

Referenced by llvm::SparcInstrInfo::insertBranch(), isCondBranchOpcode(), and parseCondBranch().

isUncondBranchOpcode()

static bool isUncondBranchOpcode ( int  Opc )

static

Definition at line 161 of file SparcInstrInfo.cpp.

parseCondBranch()

static void parseCondBranch ( MachineInstr *  LastInst, MachineBasicBlock *&  Target, SmallVectorImpl< MachineOperand > &  Cond  )

static

Definition at line 192 of file SparcInstrInfo.cpp.

References CC, Cond, llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and isRegCondBranchOpcode().

Variable Documentation

BPccDisplacementBits

cl::opt< unsigned > BPccDisplacementBits("sparc-bpcc-offset-bits", cl::Hidden, cl::init(19), cl::desc("Restrict range of BPcc/FBPfcc instructions (DEBUG)")) ( "sparc-bpcc-offset-bits"  , cl::Hidden  , cl::init(19)  , cl::desc("Restrict range of BPcc/FBPfcc instructions (DEBUG)")    )

static

Referenced by llvm::SparcInstrInfo::isBranchOffsetInRange().

BPrDisplacementBits

cl::opt< unsigned > BPrDisplacementBits("sparc-bpr-offset-bits", cl::Hidden, cl::init(16), cl::desc("Restrict range of BPr instructions (DEBUG)")) ( "sparc-bpr-offset-bits"  , cl::Hidden  , cl::init(16)  , cl::desc("Restrict range of BPr instructions (DEBUG)")    )

static

Referenced by llvm::SparcInstrInfo::isBranchOffsetInRange().