LLVM  12.0.0git
BPFAsmBackend.cpp
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1 //===-- BPFAsmBackend.cpp - BPF Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "llvm/ADT/StringRef.h"
11 #include "llvm/MC/MCAsmBackend.h"
12 #include "llvm/MC/MCAssembler.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCFixup.h"
15 #include "llvm/MC/MCObjectWriter.h"
17 #include <cassert>
18 #include <cstdint>
19 
20 using namespace llvm;
21 
22 namespace {
23 
24 class BPFAsmBackend : public MCAsmBackend {
25 public:
26  BPFAsmBackend(support::endianness Endian) : MCAsmBackend(Endian) {}
27  ~BPFAsmBackend() override = default;
28 
29  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
31  uint64_t Value, bool IsResolved,
32  const MCSubtargetInfo *STI) const override;
33 
34  std::unique_ptr<MCObjectTargetWriter>
35  createObjectTargetWriter() const override;
36 
37  // No instruction requires relaxation
38  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
39  const MCRelaxableFragment *DF,
40  const MCAsmLayout &Layout) const override {
41  return false;
42  }
43 
44  unsigned getNumFixupKinds() const override { return 1; }
45 
46  bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
47 };
48 
49 } // end anonymous namespace
50 
51 bool BPFAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
52  if ((Count % 8) != 0)
53  return false;
54 
55  for (uint64_t i = 0; i < Count; i += 8)
56  support::endian::write<uint64_t>(OS, 0x15000000, Endian);
57 
58  return true;
59 }
60 
61 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
62  const MCValue &Target,
64  bool IsResolved,
65  const MCSubtargetInfo *STI) const {
66  if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) {
67  // The Value is 0 for global variables, and the in-section offset
68  // for static variables. Write to the immediate field of the inst.
69  assert(Value <= UINT32_MAX);
70  support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4],
71  static_cast<uint32_t>(Value),
72  Endian);
73  } else if (Fixup.getKind() == FK_Data_4) {
74  support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian);
75  } else if (Fixup.getKind() == FK_Data_8) {
76  support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian);
77  } else if (Fixup.getKind() == FK_PCRel_4) {
78  Value = (uint32_t)((Value - 8) / 8);
79  if (Endian == support::little) {
80  Data[Fixup.getOffset() + 1] = 0x10;
81  support::endian::write32le(&Data[Fixup.getOffset() + 4], Value);
82  } else {
83  Data[Fixup.getOffset() + 1] = 0x1;
84  support::endian::write32be(&Data[Fixup.getOffset() + 4], Value);
85  }
86  } else {
87  assert(Fixup.getKind() == FK_PCRel_2);
88  Value = (uint16_t)((Value - 8) / 8);
89  support::endian::write<uint16_t>(&Data[Fixup.getOffset() + 2], Value,
90  Endian);
91  }
92 }
93 
94 std::unique_ptr<MCObjectTargetWriter>
95 BPFAsmBackend::createObjectTargetWriter() const {
96  return createBPFELFObjectWriter(0);
97 }
98 
100  const MCSubtargetInfo &STI,
101  const MCRegisterInfo &MRI,
102  const MCTargetOptions &) {
103  return new BPFAsmBackend(support::little);
104 }
105 
107  const MCSubtargetInfo &STI,
108  const MCRegisterInfo &MRI,
109  const MCTargetOptions &) {
110  return new BPFAsmBackend(support::big);
111 }
void write32be(void *P, uint32_t V)
Definition: Endian.h:419
This class represents lattice values for constants.
Definition: AllocatorList.h:23
std::unique_ptr< MCObjectTargetWriter > createBPFELFObjectWriter(uint8_t OSABI)
This represents an "assembler immediate".
Definition: MCValue.h:37
void write32le(void *P, uint32_t V)
Definition: Endian.h:416
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:81
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
A four-byte section relative fixup.
Definition: MCFixup.h:42
A four-byte fixup.
Definition: MCFixup.h:25
MCAsmBackend * createBPFAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
unsigned const MachineRegisterInfo * MRI
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:298
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
PowerPC TLS Dynamic Call Fixup
A two-byte pc relative fixup.
Definition: MCFixup.h:29
A four-byte pc relative fixup.
Definition: MCFixup.h:30
MCAsmBackend * createBPFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Target - Wrapper for Target specific information.
A eight-byte section relative fixup.
Definition: MCFixup.h:43
Generic base class for all target subtargets.
A eight-byte fixup.
Definition: MCFixup.h:26
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:75
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50