LLVM 22.0.0git
M68kRegisterBankInfo.h
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1//===-- M68kRegisterBankInfo.h ----------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file declares the targeting of the RegisterBankInfo class for M68k.
10/// \todo This should be generated by TableGen.
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
14#define LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
15
17
18#define GET_REGBANK_DECLARATIONS
19#include "M68kGenRegisterBank.inc"
20#undef GET_REGBANK_DECLARATIONS
21
22namespace llvm {
23
24class TargetRegisterInfo;
25
27protected:
28#define GET_TARGET_REGBANK_CLASS
29#include "M68kGenRegisterBank.inc"
30#undef GET_TARGET_REGBANK_CLASS
31};
32
33/// This class provides the information for the target register banks.
35public:
37
38 const InstructionMapping &
39 getInstrMapping(const MachineInstr &MI) const override;
40};
41} // end namespace llvm
42#endif // LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
IRTranslator LLVM IR MI
Register const TargetRegisterInfo * TRI
M68kRegisterBankInfo(const TargetRegisterInfo &TRI)
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Representation of each machine instruction.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
RegisterBankInfo(const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode)
Create a RegisterBankInfo that can accommodate up to NumRegBanks RegisterBank instances.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.