LLVM  12.0.0git
PPCMCCodeEmitter.h
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1 //===-- PPCMCCodeEmitter.h - Convert PPC code to machine code -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PPCMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
14 #define LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
15 
16 #include "llvm/MC/MCAsmInfo.h"
17 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCInst.h"
22 
23 namespace llvm {
24 
26  const MCInstrInfo &MCII;
27  const MCContext &CTX;
28  bool IsLittleEndian;
29 
30 public:
32  : MCII(mcii), CTX(ctx),
33  IsLittleEndian(ctx.getAsmInfo()->isLittleEndian()) {}
34  PPCMCCodeEmitter(const PPCMCCodeEmitter &) = delete;
35  void operator=(const PPCMCCodeEmitter &) = delete;
36  ~PPCMCCodeEmitter() override = default;
37 
38  unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo,
40  const MCSubtargetInfo &STI) const;
41  unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo,
43  const MCSubtargetInfo &STI) const;
44  unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo,
46  const MCSubtargetInfo &STI) const;
47  unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo,
49  const MCSubtargetInfo &STI) const;
50  unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,
52  const MCSubtargetInfo &STI) const;
53  uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo,
55  const MCSubtargetInfo &STI) const;
56  unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo,
58  const MCSubtargetInfo &STI) const;
59  unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo,
61  const MCSubtargetInfo &STI) const;
62  unsigned getMemRIX16Encoding(const MCInst &MI, unsigned OpNo,
64  const MCSubtargetInfo &STI) const;
65  uint64_t getMemRI34PCRelEncoding(const MCInst &MI, unsigned OpNo,
67  const MCSubtargetInfo &STI) const;
68  uint64_t getMemRI34Encoding(const MCInst &MI, unsigned OpNo,
70  const MCSubtargetInfo &STI) const;
71  unsigned getSPE8DisEncoding(const MCInst &MI, unsigned OpNo,
73  const MCSubtargetInfo &STI) const;
74  unsigned getSPE4DisEncoding(const MCInst &MI, unsigned OpNo,
76  const MCSubtargetInfo &STI) const;
77  unsigned getSPE2DisEncoding(const MCInst &MI, unsigned OpNo,
79  const MCSubtargetInfo &STI) const;
80  unsigned getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
82  const MCSubtargetInfo &STI) const;
83  unsigned getTLSCallEncoding(const MCInst &MI, unsigned OpNo,
85  const MCSubtargetInfo &STI) const;
86  unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
88  const MCSubtargetInfo &STI) const;
89 
90  /// getMachineOpValue - Return binary encoding of operand. If the machine
91  /// operand requires relocation, record the relocation and return zero.
92  uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
94  const MCSubtargetInfo &STI) const;
95 
96  // getBinaryCodeForInstr - TableGen'erated function for getting the
97  // binary encoding for an instruction.
98  uint64_t getBinaryCodeForInstr(const MCInst &MI,
100  const MCSubtargetInfo &STI) const;
101 
102  void encodeInstruction(const MCInst &MI, raw_ostream &OS,
103  SmallVectorImpl<MCFixup> &Fixups,
104  const MCSubtargetInfo &STI) const override;
105 
106  // Get the number of bytes used to encode the given MCInst.
107  unsigned getInstSizeInBytes(const MCInst &MI) const;
108 
109  // Is this instruction a prefixed instruction.
110  bool isPrefixedInstruction(const MCInst &MI) const;
111 
112 private:
113  FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const;
114  void
115  verifyInstructionPredicates(const MCInst &MI,
116  const FeatureBitset &AvailableFeatures) const;
117 };
118 
119 } // namespace llvm
120 
121 #endif // LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getTLSRegEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void encodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
~PPCMCCodeEmitter() override=default
unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemRIX16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
Context object for machine code objects.
Definition: MCContext.h:67
unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSPE4DisEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
uint64_t getMemRI34Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
Container class for subtarget features.
uint64_t getMemRI34PCRelEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
unsigned getInstSizeInBytes(const MCInst &MI) const
unsigned getSPE2DisEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)
unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getTLSCallEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
bool isPrefixedInstruction(const MCInst &MI) const
uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMachineOpValue - Return binary encoding of operand.
Generic base class for all target subtargets.
unsigned getSPE8DisEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void operator=(const PPCMCCodeEmitter &)=delete
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
IRTranslator LLVM IR MI
uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34