LLVM 17.0.0git
Classes | Namespaces | Macros | Enumerations | Functions | Variables
RISCVInstrInfo.h File Reference
#include "RISCVRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "RISCVGenInstrInfo.inc"
#include "RISCVGenSearchableTables.inc"
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Classes

class  llvm::RISCVInstrInfo
 
struct  llvm::RISCVVPseudosTable::PseudoInfo
 

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
 
namespace  llvm::RISCVCC
 
namespace  llvm::RISCV
 
namespace  llvm::RISCVVPseudosTable
 

Macros

#define GET_INSTRINFO_HEADER
 
#define GET_INSTRINFO_OPERAND_ENUM
 
#define GET_RISCVVPseudosTable_DECL
 

Enumerations

enum  llvm::RISCVCC::CondCode {
  llvm::RISCVCC::COND_EQ , llvm::RISCVCC::COND_NE , llvm::RISCVCC::COND_LT , llvm::RISCVCC::COND_GE ,
  llvm::RISCVCC::COND_LTU , llvm::RISCVCC::COND_GEU , llvm::RISCVCC::COND_INVALID
}
 

Functions

CondCode llvm::RISCVCC::getOppositeBranchCondition (CondCode)
 
bool llvm::RISCV::isSEXT_W (const MachineInstr &MI)
 
bool llvm::RISCV::isZEXT_W (const MachineInstr &MI)
 
bool llvm::RISCV::isZEXT_B (const MachineInstr &MI)
 
bool llvm::RISCV::isRVVSpill (const MachineInstr &MI)
 
std::optional< std::pair< unsigned, unsigned > > llvm::RISCV::isRVVSpillForZvlsseg (unsigned Opcode)
 
bool llvm::RISCV::isFaultFirstLoad (const MachineInstr &MI)
 
int16_t llvm::RISCV::getNamedOperandIdx (uint16_t Opcode, uint16_t NamedIndex)
 
bool llvm::RISCV::hasEqualFRM (const MachineInstr &MI1, const MachineInstr &MI2)
 

Variables

static constexpr int64_t llvm::RISCV::VLMaxSentinel = -1LL
 

Macro Definition Documentation

◆ GET_INSTRINFO_HEADER

#define GET_INSTRINFO_HEADER

Definition at line 20 of file RISCVInstrInfo.h.

◆ GET_INSTRINFO_OPERAND_ENUM

#define GET_INSTRINFO_OPERAND_ENUM

Definition at line 21 of file RISCVInstrInfo.h.

◆ GET_RISCVVPseudosTable_DECL

#define GET_RISCVVPseudosTable_DECL

Definition at line 273 of file RISCVInstrInfo.h.