14#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERBANKINFO_H
15#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERBANKINFO_H
19#define GET_REGBANK_DECLARATIONS
20#include "WebAssemblyGenRegisterBank.inc"
24class TargetRegisterInfo;
27#define GET_TARGET_REGBANK_CLASS
28#include "WebAssemblyGenRegisterBank.inc"
Register const TargetRegisterInfo * TRI
Representation of each machine instruction.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
RegisterBankInfo(const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode)
Create a RegisterBankInfo that can accommodate up to NumRegBanks RegisterBank instances.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
WebAssemblyRegisterBankInfo(const TargetRegisterInfo &TRI)
This is an optimization pass for GlobalISel generic memory operations.