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MSP430InstrInfo.h
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1 //===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the MSP430 implementation of the TargetInstrInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
14 #define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
15 
16 #include "MSP430RegisterInfo.h"
18 
19 #define GET_INSTRINFO_HEADER
20 #include "MSP430GenInstrInfo.inc"
21 
22 namespace llvm {
23 
24 class MSP430Subtarget;
25 
27  const MSP430RegisterInfo RI;
28  virtual void anchor();
29 public:
30  explicit MSP430InstrInfo(MSP430Subtarget &STI);
31 
32  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
33  /// such, whenever a client has an instance of instruction info, it should
34  /// always be able to get register info as well (through this method).
35  ///
36  const TargetRegisterInfo &getRegisterInfo() const { return RI; }
37 
39  const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
40  bool KillSrc) const override;
41 
44  unsigned SrcReg, bool isKill,
45  int FrameIndex,
46  const TargetRegisterClass *RC,
47  const TargetRegisterInfo *TRI) const override;
50  unsigned DestReg, int FrameIdx,
51  const TargetRegisterClass *RC,
52  const TargetRegisterInfo *TRI) const override;
53 
54  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
55 
56  // Branch folding goodness
57  bool
59  bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
61  MachineBasicBlock *&FBB,
63  bool AllowModify) const override;
64 
65  unsigned removeBranch(MachineBasicBlock &MBB,
66  int *BytesRemoved = nullptr) const override;
69  const DebugLoc &DL,
70  int *BytesAdded = nullptr) const override;
71 
72  int64_t getFramePoppedByCallee(const MachineInstr &I) const {
73  assert(isFrameInstr(I) && "Not a frame instruction");
74  assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative");
75  return I.getOperand(1).getImm();
76  }
77 };
78 
79 }
80 
81 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
bool isUnpredicatedTerminator(const MachineInstr &MI) const override
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
unsigned getInstSizeInBytes(const MachineInstr &MI) const override
GetInstSize - Return the number of bytes of code the specified instruction may be.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
MSP430InstrInfo(MSP430Subtarget &STI)
int64_t getImm() const
int64_t getFramePoppedByCallee(const MachineInstr &I) const
Representation of each machine instruction.
Definition: MachineInstr.h:63
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
IRTranslator LLVM IR MI
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
const TargetRegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.