LLVM  9.0.0svn
RISCVBaseInfo.h
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1 //===-- RISCVBaseInfo.h - Top level definitions for RISCV MC ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains small standalone enum definitions for the RISCV target
10 // useful for the compiler back-end and the MC libraries.
11 //
12 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVBASEINFO_H
14 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVBASEINFO_H
15 
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/ADT/StringSwitch.h"
20 
21 namespace llvm {
22 
23 // RISCVII - This namespace holds all of the target specific flags that
24 // instruction info tracks. All definitions must match RISCVInstrFormats.td.
25 namespace RISCVII {
26 enum {
45 
47 };
48 
49 enum {
56 };
57 } // namespace RISCVII
58 
59 // Describes the predecessor/successor bits used in the FENCE instruction.
60 namespace RISCVFenceField {
61 enum FenceField {
62  I = 8,
63  O = 4,
64  R = 2,
65  W = 1
66 };
67 }
68 
69 // Describes the supported floating point rounding mode encodings.
70 namespace RISCVFPRndMode {
72  RNE = 0,
73  RTZ = 1,
74  RDN = 2,
75  RUP = 3,
76  RMM = 4,
77  DYN = 7,
78  Invalid
79 };
80 
82  switch (RndMode) {
83  default:
84  llvm_unreachable("Unknown floating point rounding mode");
86  return "rne";
88  return "rtz";
90  return "rdn";
92  return "rup";
94  return "rmm";
96  return "dyn";
97  }
98 }
99 
101  return StringSwitch<RoundingMode>(Str)
102  .Case("rne", RISCVFPRndMode::RNE)
103  .Case("rtz", RISCVFPRndMode::RTZ)
104  .Case("rdn", RISCVFPRndMode::RDN)
105  .Case("rup", RISCVFPRndMode::RUP)
106  .Case("rmm", RISCVFPRndMode::RMM)
107  .Case("dyn", RISCVFPRndMode::DYN)
109 }
110 
111 inline static bool isValidRoundingMode(unsigned Mode) {
112  switch (Mode) {
113  default:
114  return false;
115  case RISCVFPRndMode::RNE:
116  case RISCVFPRndMode::RTZ:
117  case RISCVFPRndMode::RDN:
118  case RISCVFPRndMode::RUP:
119  case RISCVFPRndMode::RMM:
120  case RISCVFPRndMode::DYN:
121  return true;
122  }
123 }
124 } // namespace RISCVFPRndMode
125 
126 namespace RISCVSysReg {
127 struct SysReg {
128  const char *Name;
129  unsigned Encoding;
130  // FIXME: add these additional fields when needed.
131  // Privilege Access: Read, Write, Read-Only.
132  // unsigned ReadWrite;
133  // Privilege Mode: User, System or Machine.
134  // unsigned Mode;
135  // Check field name.
136  // unsigned Extra;
137  // Register number without the privilege bits.
138  // unsigned Number;
141 
142  bool haveRequiredFeatures(FeatureBitset ActiveFeatures) const {
143  // Not in 32-bit mode.
144  if (isRV32Only && ActiveFeatures[RISCV::Feature64Bit])
145  return false;
146  // No required feature associated with the system register.
147  if (FeaturesRequired.none())
148  return true;
149  return (FeaturesRequired & ActiveFeatures) == FeaturesRequired;
150  }
151 };
152 
153 #define GET_SysRegsList_DECL
154 #include "RISCVGenSystemOperands.inc"
155 } // end namespace RISCVSysReg
156 
157 namespace RISCVABI {
158 
159 enum ABI {
168 };
169 
170 // Returns the target ABI, or else a StringError if the requested ABIName is
171 // not supported for the given TT and FeatureBits combination.
172 ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
173  StringRef ABIName);
174 
175 } // namespace RISCVABI
176 
177 namespace RISCVFeatures {
178 
179 // Validates if the given combination of features are valid for the target
180 // triple. Exits with report_fatal_error if not.
181 void validate(const Triple &TT, const FeatureBitset &FeatureBits);
182 
183 } // namespace RISCVFeatures
184 
185 } // namespace llvm
186 
187 #endif
static bool isValidRoundingMode(unsigned Mode)
static ARMBaseTargetMachine::ARMABI computeTargetABI(const Triple &TT, StringRef CPU, const TargetOptions &Options)
SI Whole Quad Mode
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static RoundingMode stringToRoundingMode(StringRef Str)
bool haveRequiredFeatures(FeatureBitset ActiveFeatures) const
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
FeatureBitset FeaturesRequired
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
Container class for subtarget features.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
#define I(x, y, z)
Definition: MD5.cpp:58
static StringRef roundingModeToString(RoundingMode RndMode)
Definition: RISCVBaseInfo.h:81
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
void validate(const Triple &TT, const FeatureBitset &FeatureBits)