12#ifndef LLVM_TRANSFORMS_UTILS_MEMORYTAGGINGSUPPORT_H
13#define LLVM_TRANSFORMS_UTILS_MEMORYTAGGINGSUPPORT_H
26class DbgVariableIntrinsic;
28class PostDominatorTree;
80 : SSI(SSI), DebugType(DebugType) {}
89 const char *DebugType;
Analysis containing CSE Info
This file implements a map that provides insertion order iteration.
This file defines the SmallVector class.
an instruction to allocate memory on the stack
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
This class implements a map that also provides access to all stored values in a deterministic order.
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
Triple - Helper class for working with autoconf configuration names.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
void visit(OptimizationRemarkEmitter &ORE, Instruction &Inst)
AllocaInterestingness getAllocaInterestingness(const AllocaInst &AI)
StackInfoBuilder(const StackSafetyGlobalInfo *SSI, const char *DebugType)
Value * getFP(IRBuilder<> &IRB)
bool isStandardLifetime(const SmallVectorImpl< IntrinsicInst * > &LifetimeStart, const SmallVectorImpl< IntrinsicInst * > &LifetimeEnd, const DominatorTree *DT, const LoopInfo *LI, size_t MaxLifetimes)
bool forAllReachableExits(const DominatorTree &DT, const PostDominatorTree &PDT, const LoopInfo &LI, const Instruction *Start, const SmallVectorImpl< IntrinsicInst * > &Ends, const SmallVectorImpl< Instruction * > &RetVec, llvm::function_ref< void(Instruction *)> Callback)
uint64_t getAllocaSizeInBytes(const AllocaInst &AI)
Value * getAndroidSlotPtr(IRBuilder<> &IRB, int Slot)
Value * readRegister(IRBuilder<> &IRB, StringRef Name)
Value * incrementThreadLong(IRBuilder<> &IRB, Value *ThreadLong, unsigned int Inc)
void annotateDebugRecords(AllocaInfo &Info, unsigned int Tag)
Instruction * getUntagLocationIfFunctionExit(Instruction &Inst)
void alignAndPadAlloca(memtag::AllocaInfo &Info, llvm::Align Align)
Value * getPC(const Triple &TargetTriple, IRBuilder<> &IRB)
bool isLifetimeIntrinsic(Value *V)
This is an optimization pass for GlobalISel generic memory operations.
This struct is a compact representation of a valid (non-zero power of two) alignment.
SmallVector< DbgVariableIntrinsic *, 2 > DbgVariableIntrinsics
SmallVector< DbgVariableRecord *, 2 > DbgVariableRecords
SmallVector< IntrinsicInst *, 2 > LifetimeEnd
SmallVector< IntrinsicInst *, 2 > LifetimeStart
MapVector< AllocaInst *, AllocaInfo > AllocasToInstrument
SmallVector< Instruction *, 4 > UnrecognizedLifetimes
SmallVector< Instruction *, 8 > RetVec