LLVM 20.0.0git
Namespaces | Macros | Functions
X86AsmBackend.cpp File Reference
#include "MCTargetDesc/X86BaseInfo.h"
#include "MCTargetDesc/X86EncodingOptimization.h"
#include "MCTargetDesc/X86FixupKinds.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCELFStreamer.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCMachObjectWriter.h"
#include "llvm/MC/MCObjectStreamer.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSectionMachO.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
#include "llvm/BinaryFormat/ELFRelocs/i386.def"

Go to the source code of this file.

Namespaces

namespace  CU
 

Macros

#define ELF_RELOC(X, Y)   .Case(#X, Y)
 
#define ELF_RELOC(X, Y)   .Case(#X, Y)
 

Functions

static bool isRelaxableBranch (unsigned Opcode)
 
static unsigned getRelaxedOpcodeBranch (unsigned Opcode, bool Is16BitMode=false)
 
static unsigned getRelaxedOpcode (const MCInst &MI, bool Is16BitMode)
 
static X86::CondCode getCondFromBranch (const MCInst &MI, const MCInstrInfo &MCII)
 
static X86::SecondMacroFusionInstKind classifySecondInstInMacroFusion (const MCInst &MI, const MCInstrInfo &MCII)
 
static bool isRIPRelative (const MCInst &MI, const MCInstrInfo &MCII)
 Check if the instruction uses RIP relative addressing.
 
static bool isPrefix (unsigned Opcode, const MCInstrInfo &MCII)
 Check if the instruction is a prefix.
 
static bool isFirstMacroFusibleInst (const MCInst &Inst, const MCInstrInfo &MCII)
 Check if the instruction is valid as the first instruction in macro fusion.
 
static bool hasVariantSymbol (const MCInst &MI)
 Check if the instruction has a variant symbol operand.
 
static bool mayHaveInterruptDelaySlot (unsigned InstOpcode)
 X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.
 
static bool isRightAfterData (MCFragment *CurrentFragment, const std::pair< MCFragment *, size_t > &PrevInstPosition)
 Check if the instruction to be emitted is right after any data.
 
static size_t getSizeForInstFragment (const MCFragment *F)
 
static unsigned getFixupKindSize (unsigned Kind)
 

Macro Definition Documentation

◆ ELF_RELOC [1/2]

#define ELF_RELOC (   X,
  Y 
)    .Case(#X, Y)

◆ ELF_RELOC [2/2]

#define ELF_RELOC (   X,
  Y 
)    .Case(#X, Y)

Function Documentation

◆ classifySecondInstInMacroFusion()

static X86::SecondMacroFusionInstKind classifySecondInstInMacroFusion ( const MCInst MI,
const MCInstrInfo MCII 
)
static

Definition at line 250 of file X86AsmBackend.cpp.

References CC, getCondFromBranch(), and MI.

◆ getCondFromBranch()

static X86::CondCode getCondFromBranch ( const MCInst MI,
const MCInstrInfo MCII 
)
static

Definition at line 235 of file X86AsmBackend.cpp.

References llvm::X86::COND_INVALID, llvm::MCInstrInfo::get(), and MI.

Referenced by classifySecondInstInMacroFusion().

◆ getFixupKindSize()

static unsigned getFixupKindSize ( unsigned  Kind)
static

◆ getRelaxedOpcode()

static unsigned getRelaxedOpcode ( const MCInst MI,
bool  Is16BitMode 
)
static

◆ getRelaxedOpcodeBranch()

static unsigned getRelaxedOpcodeBranch ( unsigned  Opcode,
bool  Is16BitMode = false 
)
static

Definition at line 217 of file X86AsmBackend.cpp.

References llvm_unreachable.

Referenced by getRelaxedOpcode().

◆ getSizeForInstFragment()

static size_t getSizeForInstFragment ( const MCFragment F)
static
Returns
the fragment size if it has instructions, otherwise returns 0.

Definition at line 429 of file X86AsmBackend.cpp.

References F, llvm::MCFragment::FT_Data, llvm::MCFragment::FT_Relaxable, and llvm_unreachable.

◆ hasVariantSymbol()

static bool hasVariantSymbol ( const MCInst MI)
static

Check if the instruction has a variant symbol operand.

Definition at line 363 of file X86AsmBackend.cpp.

References llvm::MCExpr::getKind(), MI, llvm::MCExpr::SymbolRef, and llvm::MCSymbolRefExpr::VK_None.

◆ isFirstMacroFusibleInst()

static bool isFirstMacroFusibleInst ( const MCInst Inst,
const MCInstrInfo MCII 
)
static

Check if the instruction is valid as the first instruction in macro fusion.

Definition at line 275 of file X86AsmBackend.cpp.

References llvm::X86::classifyFirstOpcodeInMacroFusion(), llvm::MCInst::getOpcode(), and isRIPRelative().

◆ isPrefix()

static bool isPrefix ( unsigned  Opcode,
const MCInstrInfo MCII 
)
static

Check if the instruction is a prefix.

Definition at line 270 of file X86AsmBackend.cpp.

References llvm::MCInstrInfo::get(), llvm::X86II::isPrefix(), and llvm::MCInstrDesc::TSFlags.

Referenced by readPrefixes().

◆ isRelaxableBranch()

static bool isRelaxableBranch ( unsigned  Opcode)
static

Definition at line 213 of file X86AsmBackend.cpp.

Referenced by getRelaxedOpcode().

◆ isRightAfterData()

static bool isRightAfterData ( MCFragment CurrentFragment,
const std::pair< MCFragment *, size_t > &  PrevInstPosition 
)
static

Check if the instruction to be emitted is right after any data.

Definition at line 406 of file X86AsmBackend.cpp.

References DF, and F.

◆ isRIPRelative()

static bool isRIPRelative ( const MCInst MI,
const MCInstrInfo MCII 
)
static

Check if the instruction uses RIP relative addressing.

Definition at line 256 of file X86AsmBackend.cpp.

References llvm::X86::AddrBaseReg, llvm::MCInstrInfo::get(), llvm::X86II::getMemoryOperandNo(), llvm::X86II::getOperandBias(), and MI.

Referenced by isFirstMacroFusibleInst().

◆ mayHaveInterruptDelaySlot()

static bool mayHaveInterruptDelaySlot ( unsigned  InstOpcode)
static

X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.

Return true if the given instruction may have such an interrupt delay slot.

Definition at line 386 of file X86AsmBackend.cpp.