#include "Target/AArch64/AArch64SelectionDAGInfo.h"

Inheritance diagram for llvm::AArch64SelectionDAGInfo:

Public Member Functions
bool	isTargetMemoryOpcode (unsigned Opcode) const override
	Returns true if a node with the given target-specific opcode has a memory operand.

bool	isTargetStrictFPOpcode (unsigned Opcode) const override
	Returns true if a node with the given target-specific opcode has strict floating-point semantics.

SDValue	EmitMOPS (unsigned Opcode, SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue SrcOrValue, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const

SDValue	EmitTargetCodeForMemcpy (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
	Emit target-specific code that performs a memcpy.

SDValue	EmitTargetCodeForMemset (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo) const override
	Emit target-specific code that performs a memset.

SDValue	EmitTargetCodeForMemmove (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
	Emit target-specific code that performs a memmove.

SDValue	EmitTargetCodeForSetTag (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo DstPtrInfo, bool ZeroData) const override

SDValue	EmitStreamingCompatibleMemLibCall (SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, RTLIB::Libcall LC) const

Public Member Functions inherited from llvm::SelectionDAGTargetInfo
	SelectionDAGTargetInfo ()=default

	SelectionDAGTargetInfo (const SelectionDAGTargetInfo &)=delete

SelectionDAGTargetInfo &	operator= (const SelectionDAGTargetInfo &)=delete

virtual	~SelectionDAGTargetInfo ()

virtual bool	isTargetMemoryOpcode (unsigned Opcode) const
	Returns true if a node with the given target-specific opcode has a memory operand.

virtual bool	isTargetStrictFPOpcode (unsigned Opcode) const
	Returns true if a node with the given target-specific opcode has strict floating-point semantics.

virtual bool	mayRaiseFPException (unsigned Opcode) const
	Returns true if a node with the given target-specific opcode may raise a floating-point exception.

virtual SDValue	EmitTargetCodeForMemcpy (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
	Emit target-specific code that performs a memcpy.

virtual SDValue	EmitTargetCodeForMemmove (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
	Emit target-specific code that performs a memmove.

virtual SDValue	EmitTargetCodeForMemset (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo) const
	Emit target-specific code that performs a memset.

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForMemcmp (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const
	Emit target-specific code that performs a memcmp/bcmp, in cases where that is faster than a libcall.

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForMemchr (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const
	Emit target-specific code that performs a memchr, in cases where that is faster than a libcall.

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForStrcpy (SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const
	Emit target-specific code that performs a strcpy or stpcpy, in cases where that is faster than a libcall.

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForStrcmp (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const
	Emit target-specific code that performs a strcmp, in cases where that is faster than a libcall.

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForStrlen (SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, MachinePointerInfo SrcPtrInfo) const

virtual std::pair< SDValue, SDValue >	EmitTargetCodeForStrnlen (SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const

virtual SDValue	EmitTargetCodeForSetTag (SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Addr, SDValue Size, MachinePointerInfo DstPtrInfo, bool ZeroData) const

virtual bool	disableGenericCombines (CodeGenOptLevel OptLevel) const

Detailed Description

Definition at line 20 of file AArch64SelectionDAGInfo.h.

Member Function Documentation

◆ EmitMOPS()

SDValue AArch64SelectionDAGInfo::EmitMOPS	(	unsigned	Opcode,
		SelectionDAG &	DAG,
		const SDLoc &	DL,
		SDValue	Chain,
		SDValue	Dst,
		SDValue	SrcOrValue,
		SDValue	Size,
		Align	Alignment,
		bool	isVolatile,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo
	)		const

Definition at line 36 of file AArch64SelectionDAGInfo.cpp.

References llvm::ISD::ANY_EXTEND, llvm::CallingConv::C, DL, llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MONone, llvm::MachineMemOperand::MOStore, llvm::MachineMemOperand::MOVolatile, llvm::SelectionDAG::setNodeMemRefs(), and Size.

Referenced by EmitTargetCodeForMemcpy(), EmitTargetCodeForMemmove(), and EmitTargetCodeForMemset().

◆ EmitStreamingCompatibleMemLibCall()

SDValue AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall	(	SelectionDAG &	DAG,
		const SDLoc &	DL,
		SDValue	Chain,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		RTLIB::Libcall	LC
	)		const

Definition at line 82 of file AArch64SelectionDAGInfo.cpp.

References assert(), DL, llvm::ISD::ExternalSymbol, llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getExternalSymbol(), llvm::Type::getInt32Ty(), llvm::DataLayout::getIntPtrType(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::PointerType::getUnqual(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::TargetLoweringBase::ArgListEntry::Node, RetTy, llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), Size, and llvm::TargetLoweringBase::ArgListEntry::Ty.

Referenced by EmitTargetCodeForMemcpy(), EmitTargetCodeForMemmove(), and EmitTargetCodeForMemset().

◆ EmitTargetCodeForMemcpy()

SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemcpy	(	SelectionDAG &	DAG,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		Align	Alignment,
		bool	isVolatile,
		bool	AlwaysInline,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo
	)		const

overridevirtual

Emit target-specific code that performs a memcpy.

This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple loads/stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used.

If AlwaysInline is true, the size is constant and the target should not emit any calls and is strongly encouraged to attempt to emit inline code even if it is beyond the usual threshold because this intrinsic is being expanded in a place where calls are not feasible (e.g. within the prologue for another call). If the target chooses to decline an AlwaysInline request here, legalize will resort to using simple loads and stores.

Reimplemented from llvm::SelectionDAGTargetInfo.

Definition at line 140 of file AArch64SelectionDAGInfo.cpp.

References DL, EmitMOPS(), EmitStreamingCompatibleMemLibCall(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getSubtarget(), LowerToSMERoutines, and Size.

◆ EmitTargetCodeForMemmove()

SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemmove	(	SelectionDAG &	DAG,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		Align	Alignment,
		bool	isVolatile,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo
	)		const

overridevirtual

Emit target-specific code that performs a memmove.

This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple loads/stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used.

Reimplemented from llvm::SelectionDAGTargetInfo.

Definition at line 177 of file AArch64SelectionDAGInfo.cpp.

References EmitMOPS(), EmitStreamingCompatibleMemLibCall(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getSubtarget(), LowerToSMERoutines, and Size.

◆ EmitTargetCodeForMemset()

SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset	(	SelectionDAG &	DAG,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		Align	Alignment,
		bool	isVolatile,
		bool	AlwaysInline,
		MachinePointerInfo	DstPtrInfo
	)		const

overridevirtual

Emit target-specific code that performs a memset.

This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used. Note that if AlwaysInline is true the function has to return a valid SDValue.

Reimplemented from llvm::SelectionDAGTargetInfo.

Definition at line 158 of file AArch64SelectionDAGInfo.cpp.

References EmitMOPS(), EmitStreamingCompatibleMemLibCall(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getSubtarget(), LowerToSMERoutines, and Size.

◆ EmitTargetCodeForSetTag()

SDValue AArch64SelectionDAGInfo::EmitTargetCodeForSetTag	(	SelectionDAG &	DAG,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		MachinePointerInfo	DstPtrInfo,
		bool	ZeroData
	)		const