LLVM 20.0.0git
Static Public Member Functions | List of all members
llvm::GExtLoad Class Reference

Represents either a G_SEXTLOAD or G_ZEXTLOAD. More...

#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"

Inheritance diagram for llvm::GExtLoad:
Inheritance graph
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Static Public Member Functions

static bool classof (const MachineInstr *MI)
 
- Static Public Member Functions inherited from llvm::GAnyLoad
static bool classof (const MachineInstr *MI)
 
- Static Public Member Functions inherited from llvm::GLoadStore
static bool classof (const MachineInstr *MI)
 
- Static Public Member Functions inherited from llvm::GMemOperation
static bool classof (const MachineInstr *MI)
 
- Static Public Member Functions inherited from llvm::GenericMachineInstr
static bool classof (const MachineInstr *MI)
 
- Static Public Member Functions inherited from llvm::MachineInstr
template<typename Operand , typename Instruction >
static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > > getDebugOperandsForReg (Instruction *MI, Register Reg)
 Returns a range of all of the operands that correspond to a debug use of Reg.
 
static uint32_t copyFlagsFromInstruction (const Instruction &I)
 

Additional Inherited Members

- Public Types inherited from llvm::MachineInstr
enum  CommentFlag { ReloadReuse = 0x1 , NoSchedComment = 0x2 , TAsmComments = 0x4 }
 Flags to specify different kinds of comments to output in assembly code. More...
 
enum  MIFlag {
  NoFlags = 0 , FrameSetup = 1 << 0 , FrameDestroy = 1 << 1 , BundledPred = 1 << 2 ,
  BundledSucc = 1 << 3 , FmNoNans = 1 << 4 , FmNoInfs = 1 << 5 , FmNsz = 1 << 6 ,
  FmArcp = 1 << 7 , FmContract = 1 << 8 , FmAfn = 1 << 9 , FmReassoc = 1 << 10 ,
  NoUWrap = 1 << 11 , NoSWrap = 1 << 12 , IsExact = 1 << 13 , NoFPExcept = 1 << 14 ,
  NoMerge = 1 << 15 , Unpredictable = 1 << 16 , NoConvergent = 1 << 17 , NonNeg = 1 << 18 ,
  Disjoint = 1 << 19 , NoUSWrap = 1 << 20 , SameSign = 1 << 21
}
 
enum  QueryType { IgnoreBundle , AnyInBundle , AllInBundle }
 API for querying MachineInstr properties. More...
 
enum  MICheckType { CheckDefs , CheckKillDead , IgnoreDefs , IgnoreVRegDefs }
 
using mmo_iterator = ArrayRef< MachineMemOperand * >::iterator
 
using mop_iterator = MachineOperand *
 iterator/begin/end - Iterate over all operands of a machine instruction.
 
using const_mop_iterator = const MachineOperand *
 
using filtered_mop_iterator = filter_iterator< mop_iterator, bool(*)(const MachineOperand &)>
 
using filtered_const_mop_iterator = filter_iterator< const_mop_iterator, bool(*)(const MachineOperand &)>
 
- Public Member Functions inherited from llvm::GAnyLoad
Register getDstReg () const
 Get the definition register of the loaded value.
 
const MDNodegetRanges () const
 Returns the Ranges that describes the dereference.
 
- Public Member Functions inherited from llvm::GLoadStore
Register getPointerReg () const
 Get the source register of the pointer value.
 
- Public Member Functions inherited from llvm::GMemOperation
MachineMemOperandgetMMO () const
 Get the MachineMemOperand on this instruction.
 
bool isAtomic () const
 Returns true if the attached MachineMemOperand has the atomic flag set.
 
bool isVolatile () const
 Returns true if the attached MachineMemOpeand as the volatile flag set.
 
bool isSimple () const
 Returns true if the memory operation is neither atomic or volatile.
 
bool isUnordered () const
 Returns true if this memory operation doesn't have any ordering constraints other than normal aliasing.
 
LocationSize getMemSize () const
 Returns the size in bytes of the memory access.
 
LocationSize getMemSizeInBits () const
 Returns the size in bits of the memory access.
 
- Public Member Functions inherited from llvm::GenericMachineInstr
 GenericMachineInstr ()=delete
 
Register getReg (unsigned Idx) const
 Access the Idx'th operand as a register and return it.
 
bool hasPoisonGeneratingFlags () const
 
void dropPoisonGeneratingFlags ()
 
- Public Member Functions inherited from llvm::MachineInstr
 MachineInstr (const MachineInstr &)=delete
 
MachineInstroperator= (const MachineInstr &)=delete
 
 ~MachineInstr ()=delete
 
const MachineBasicBlockgetParent () const
 
MachineBasicBlockgetParent ()
 
void moveBefore (MachineInstr *MovePos)
 Move the instruction before MovePos.
 
const MachineFunctiongetMF () const
 Return the function that contains the basic block that this instruction belongs to.
 
MachineFunctiongetMF ()
 
uint8_t getAsmPrinterFlags () const
 Return the asm printer flags bitvector.
 
void clearAsmPrinterFlags ()
 Clear the AsmPrinter bitvector.
 
bool getAsmPrinterFlag (CommentFlag Flag) const
 Return whether an AsmPrinter flag is set.
 
void setAsmPrinterFlag (uint8_t Flag)
 Set a flag for the AsmPrinter.
 
void clearAsmPrinterFlag (CommentFlag Flag)
 Clear specific AsmPrinter flags.
 
uint32_t getFlags () const
 Return the MI flags bitvector.
 
bool getFlag (MIFlag Flag) const
 Return whether an MI flag is set.
 
void setFlag (MIFlag Flag)
 Set a MI flag.
 
void setFlags (unsigned flags)
 
void clearFlag (MIFlag Flag)
 clearFlag - Clear a MI flag.
 
void clearFlags (unsigned flags)
 
bool isInsideBundle () const
 Return true if MI is in a bundle (but not the first MI in a bundle).
 
bool isBundled () const
 Return true if this instruction part of a bundle.
 
bool isBundledWithPred () const
 Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.
 
bool isBundledWithSucc () const
 Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.
 
void bundleWithPred ()
 Bundle this instruction with its predecessor.
 
void bundleWithSucc ()
 Bundle this instruction with its successor.
 
void unbundleFromPred ()
 Break bundle above this instruction.
 
void unbundleFromSucc ()
 Break bundle below this instruction.
 
const DebugLocgetDebugLoc () const
 Returns the debug location id of this MachineInstr.
 
const MachineOperandgetDebugOffset () const
 Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.
 
MachineOperandgetDebugOffset ()
 
const MachineOperandgetDebugVariableOp () const
 Return the operand for the debug variable referenced by this DBG_VALUE instruction.
 
MachineOperandgetDebugVariableOp ()
 
const DILocalVariablegetDebugVariable () const
 Return the debug variable referenced by this DBG_VALUE instruction.
 
const MachineOperandgetDebugExpressionOp () const
 Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
 
MachineOperandgetDebugExpressionOp ()
 
const DIExpressiongetDebugExpression () const
 Return the complex address expression referenced by this DBG_VALUE instruction.
 
const DILabelgetDebugLabel () const
 Return the debug label referenced by this DBG_LABEL instruction.
 
unsigned getDebugInstrNum ()
 Fetch the instruction number of this MachineInstr.
 
unsigned getDebugInstrNum (MachineFunction &MF)
 Fetch instruction number of this MachineInstr – but before it's inserted into MF.
 
unsigned peekDebugInstrNum () const
 Examine the instruction number of this MachineInstr.
 
void setDebugInstrNum (unsigned Num)
 Set instruction number of this MachineInstr.
 
void dropDebugNumber ()
 Drop any variable location debugging information associated with this instruction.
 
const MDNodegetLocCookieMD () const
 For inline asm, get the !srcloc metadata node if we have it, and decode the loc cookie from it.
 
void emitInlineAsmError (const Twine &ErrMsg) const
 Emit an error referring to the source location of this instruction.
 
void emitGenericError (const Twine &ErrMsg) const
 
const MCInstrDescgetDesc () const
 Returns the target instruction descriptor of this MachineInstr.
 
unsigned getOpcode () const
 Returns the opcode of this MachineInstr.
 
unsigned getNumOperands () const
 Retuns the total number of operands.
 
unsigned getNumDebugOperands () const
 Returns the total number of operands which are debug locations.
 
const MachineOperandgetOperand (unsigned i) const
 
MachineOperandgetOperand (unsigned i)
 
MachineOperandgetDebugOperand (unsigned Index)
 
const MachineOperandgetDebugOperand (unsigned Index) const
 
bool hasDebugOperandForReg (Register Reg) const
 Returns whether this debug value has at least one debug operand with the register Reg.
 
iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > getDebugOperandsForReg (Register Reg) const
 
iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > getDebugOperandsForReg (Register Reg)
 
bool isDebugOperand (const MachineOperand *Op) const
 
unsigned getDebugOperandIndex (const MachineOperand *Op) const
 
unsigned getNumDefs () const
 Returns the total number of definitions.
 
bool hasImplicitDef () const
 Returns true if the instruction has implicit definition.
 
unsigned getNumImplicitOperands () const
 Returns the implicit operands number.
 
bool isOperandSubregIdx (unsigned OpIdx) const
 Return true if operand OpIdx is a subregister index.
 
unsigned getNumExplicitOperands () const
 Returns the number of non-implicit operands.
 
unsigned getNumExplicitDefs () const
 Returns the number of non-implicit definitions.
 
mop_iterator operands_begin ()
 
mop_iterator operands_end ()
 
const_mop_iterator operands_begin () const
 
const_mop_iterator operands_end () const
 
iterator_range< mop_iteratoroperands ()
 
iterator_range< const_mop_iteratoroperands () const
 
iterator_range< mop_iteratorexplicit_operands ()
 
iterator_range< const_mop_iteratorexplicit_operands () const
 
iterator_range< mop_iteratorimplicit_operands ()
 
iterator_range< const_mop_iteratorimplicit_operands () const
 
iterator_range< mop_iteratordebug_operands ()
 Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.
 
iterator_range< const_mop_iteratordebug_operands () const
 Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.
 
iterator_range< mop_iteratordefs ()
 Returns a range over all explicit operands that are register definitions.
 
iterator_range< const_mop_iteratordefs () const
 Returns a range over all explicit operands that are register definitions.
 
iterator_range< mop_iteratoruses ()
 Returns a range that includes all operands which may be register uses.
 
iterator_range< const_mop_iteratoruses () const
 Returns a range that includes all operands which may be register uses.
 
iterator_range< mop_iteratorexplicit_uses ()
 
iterator_range< const_mop_iteratorexplicit_uses () const
 
iterator_range< filtered_mop_iteratorall_defs ()
 Returns an iterator range over all operands that are (explicit or implicit) register defs.
 
iterator_range< filtered_const_mop_iteratorall_defs () const
 Returns an iterator range over all operands that are (explicit or implicit) register defs.
 
iterator_range< filtered_mop_iteratorall_uses ()
 Returns an iterator range over all operands that are (explicit or implicit) register uses.
 
iterator_range< filtered_const_mop_iteratorall_uses () const
 Returns an iterator range over all operands that are (explicit or implicit) register uses.
 
unsigned getOperandNo (const_mop_iterator I) const
 Returns the number of the operand iterator I points to.
 
ArrayRef< MachineMemOperand * > memoperands () const
 Access to memory operands of the instruction.
 
mmo_iterator memoperands_begin () const
 Access to memory operands of the instruction.
 
mmo_iterator memoperands_end () const
 Access to memory operands of the instruction.
 
bool memoperands_empty () const
 Return true if we don't have any memory operands which described the memory access done by this instruction.
 
bool hasOneMemOperand () const
 Return true if this instruction has exactly one MachineMemOperand.
 
unsigned getNumMemOperands () const
 Return the number of memory operands.
 
MCSymbolgetPreInstrSymbol () const
 Helper to extract a pre-instruction symbol if one has been added.
 
MCSymbolgetPostInstrSymbol () const
 Helper to extract a post-instruction symbol if one has been added.
 
MDNodegetHeapAllocMarker () const
 Helper to extract a heap alloc marker if one has been added.
 
MDNodegetPCSections () const
 Helper to extract PCSections metadata target sections.
 
MDNodegetMMRAMetadata () const
 Helper to extract mmra.op metadata.
 
uint32_t getCFIType () const
 Helper to extract a CFI type hash if one has been added.
 
bool hasProperty (unsigned MCFlag, QueryType Type=AnyInBundle) const
 Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property.
 
bool isPreISelOpcode (QueryType Type=IgnoreBundle) const
 Return true if this is an instruction that should go through the usual legalization steps.
 
bool isVariadic (QueryType Type=IgnoreBundle) const
 Return true if this instruction can have a variable number of operands.
 
bool hasOptionalDef (QueryType Type=IgnoreBundle) const
 Set if this instruction has an optional definition, e.g.
 
bool isPseudo (QueryType Type=IgnoreBundle) const
 Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.
 
bool isMetaInstruction (QueryType Type=IgnoreBundle) const
 Return true if this instruction doesn't produce any output in the form of executable instructions.
 
bool isReturn (QueryType Type=AnyInBundle) const
 
bool isEHScopeReturn (QueryType Type=AnyInBundle) const
 Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.
 
bool isCall (QueryType Type=AnyInBundle) const
 
bool isCandidateForCallSiteEntry (QueryType Type=IgnoreBundle) const
 Return true if this is a call instruction that may have an associated call site entry in the debug info.
 
bool shouldUpdateCallSiteInfo () const
 Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see copyCallSiteInfo, moveCallSiteInfo, eraseCallSiteInfo).
 
bool isBarrier (QueryType Type=AnyInBundle) const
 Returns true if the specified instruction stops control flow from executing the instruction immediately following it.
 
bool isTerminator (QueryType Type=AnyInBundle) const
 Returns true if this instruction part of the terminator for a basic block.
 
bool isBranch (QueryType Type=AnyInBundle) const
 Returns true if this is a conditional, unconditional, or indirect branch.
 
bool isIndirectBranch (QueryType Type=AnyInBundle) const
 Return true if this is an indirect branch, such as a branch through a register.
 
bool isConditionalBranch (QueryType Type=AnyInBundle) const
 Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block.
 
bool isUnconditionalBranch (QueryType Type=AnyInBundle) const
 Return true if this is a branch which always transfers control flow to some other block.
 
bool isPredicable (QueryType Type=AllInBundle) const
 Return true if this instruction has a predicate operand that controls execution.
 
bool isCompare (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a comparison.
 
bool isMoveImmediate (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a move immediate (including conditional moves) instruction.
 
bool isMoveReg (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a register move.
 
bool isBitcast (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a bitcast instruction.
 
bool isSelect (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a select instruction.
 
bool isNotDuplicable (QueryType Type=AnyInBundle) const
 Return true if this instruction cannot be safely duplicated.
 
bool isConvergent (QueryType Type=AnyInBundle) const
 Return true if this instruction is convergent.
 
bool hasDelaySlot (QueryType Type=AnyInBundle) const
 Returns true if the specified instruction has a delay slot which must be filled by the code generator.
 
bool canFoldAsLoad (QueryType Type=IgnoreBundle) const
 Return true for instructions that can be folded as memory operands in other instructions.
 
bool isRegSequenceLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.
 
bool isExtractSubregLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.
 
bool isInsertSubregLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.
 
bool mayLoad (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly read memory.
 
bool mayStore (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly modify memory.
 
bool mayLoadOrStore (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly read or modify memory.
 
bool mayRaiseFPException () const
 Return true if this instruction could possibly raise a floating-point exception.
 
bool isCommutable (QueryType Type=IgnoreBundle) const
 Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.
 
bool isConvertibleTo3Addr (QueryType Type=IgnoreBundle) const
 Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed.
 
bool usesCustomInsertionHook (QueryType Type=IgnoreBundle) const
 Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block.
 
bool hasPostISelHook (QueryType Type=IgnoreBundle) const
 Return true if this instruction requires adjustment after instruction selection by calling a target hook.
 
bool isRematerializable (QueryType Type=AllInBundle) const
 Returns true if this instruction is a candidate for remat.
 
bool isAsCheapAsAMove (QueryType Type=AllInBundle) const
 Returns true if this instruction has the same cost (or less) than a move instruction.
 
bool hasExtraSrcRegAllocReq (QueryType Type=AnyInBundle) const
 Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes.
 
bool hasExtraDefRegAllocReq (QueryType Type=AnyInBundle) const
 Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes.
 
bool isIdenticalTo (const MachineInstr &Other, MICheckType Check=CheckDefs) const
 Return true if this instruction is identical to Other.
 
bool isEquivalentDbgInstr (const MachineInstr &Other) const
 Returns true if this instruction is a debug instruction that represents an identical debug value to Other.
 
MachineInstrremoveFromParent ()
 Unlink 'this' from the containing basic block, and return it without deleting it.
 
MachineInstrremoveFromBundle ()
 Unlink this instruction from its basic block and return it without deleting it.
 
void eraseFromParent ()
 Unlink 'this' from the containing basic block and delete it.
 
void eraseFromBundle ()
 Unlink 'this' from its basic block and delete it.
 
bool isEHLabel () const
 
bool isGCLabel () const
 
bool isAnnotationLabel () const
 
bool isLifetimeMarker () const
 
bool isLabel () const
 Returns true if the MachineInstr represents a label.
 
bool isCFIInstruction () const
 
bool isPseudoProbe () const
 
bool isPosition () const
 
bool isNonListDebugValue () const
 
bool isDebugValueList () const
 
bool isDebugValue () const
 
bool isDebugLabel () const
 
bool isDebugRef () const
 
bool isDebugValueLike () const
 
bool isDebugPHI () const
 
bool isDebugInstr () const
 
bool isDebugOrPseudoInstr () const
 
bool isDebugOffsetImm () const
 
bool isIndirectDebugValue () const
 A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.
 
bool isDebugEntryValue () const
 A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.
 
bool isUndefDebugValue () const
 Return true if the instruction is a debug value which describes a part of a variable as unavailable.
 
bool isJumpTableDebugInfo () const
 
bool isPHI () const
 
bool isKill () const
 
bool isImplicitDef () const
 
bool isInlineAsm () const
 
bool mayFoldInlineAsmRegOp (unsigned OpId) const
 Returns true if the register operand can be folded with a load or store into a frame index.
 
bool isStackAligningInlineAsm () const
 
InlineAsm::AsmDialect getInlineAsmDialect () const
 
bool isInsertSubreg () const
 
bool isSubregToReg () const
 
bool isRegSequence () const
 
bool isBundle () const
 
bool isCopy () const
 
bool isFullCopy () const
 
bool isExtractSubreg () const
 
bool isFakeUse () const
 
bool isCopyLike () const
 Return true if the instruction behaves like a copy.
 
bool isIdentityCopy () const
 Return true is the instruction is an identity copy.
 
bool isTransient () const
 Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.
 
unsigned getBundleSize () const
 Return the number of instructions inside the MI bundle, excluding the bundle header.
 
bool readsRegister (Register Reg, const TargetRegisterInfo *TRI) const
 Return true if the MachineInstr reads the specified register.
 
bool readsVirtualRegister (Register Reg) const
 Return true if the MachineInstr reads the specified virtual register.
 
std::pair< bool, boolreadsWritesVirtualRegister (Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
 Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.
 
bool killsRegister (Register Reg, const TargetRegisterInfo *TRI) const
 Return true if the MachineInstr kills the specified register.
 
bool definesRegister (Register Reg, const TargetRegisterInfo *TRI) const
 Return true if the MachineInstr fully defines the specified register.
 
bool modifiesRegister (Register Reg, const TargetRegisterInfo *TRI) const
 Return true if the MachineInstr modifies (fully define or partially define) the specified register.
 
bool registerDefIsDead (Register Reg, const TargetRegisterInfo *TRI) const
 Returns true if the register is dead in this machine instruction.
 
bool hasRegisterImplicitUseOperand (Register Reg) const
 Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).
 
int findRegisterUseOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
 Returns the operand index that is a use of the specific register or -1 if it is not found.
 
MachineOperandfindRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false)
 Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.
 
const MachineOperandfindRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
 
int findRegisterDefOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const
 Returns the operand index that is a def of the specified register or -1 if it is not found.
 
MachineOperandfindRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false)
 Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index.
 
const MachineOperandfindRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const
 
int findFirstPredOperandIdx () const
 Find the index of the first operand in the operand list that is used to represent the predicate.
 
int findInlineAsmFlagIdx (unsigned OpIdx, unsigned *GroupNo=nullptr) const
 Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction.
 
const TargetRegisterClassgetRegClassConstraint (unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
 Compute the static register class constraint for operand OpIdx.
 
const TargetRegisterClassgetRegClassConstraintEffectForVReg (Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
 Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.
 
const TargetRegisterClassgetRegClassConstraintEffect (unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
 Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
 
void tieOperands (unsigned DefIdx, unsigned UseIdx)
 Add a tie between the register operands at DefIdx and UseIdx.
 
unsigned findTiedOperandIdx (unsigned OpIdx) const
 Given the index of a tied register operand, find the operand it is tied to.
 
bool isRegTiedToUseOperand (unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
 Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints.
 
bool isRegTiedToDefOperand (unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
 Return true if the use operand of the specified index is tied to a def operand.
 
void clearKillInfo ()
 Clears kill flags on all operands.
 
void substituteRegister (Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
 Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.
 
bool addRegisterKilled (Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
 We have determined MI kills a register.
 
void clearRegisterKills (Register Reg, const TargetRegisterInfo *RegInfo)
 Clear all kill flags affecting Reg.
 
bool addRegisterDead (Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
 We have determined MI defined a register without a use.
 
void clearRegisterDeads (Register Reg)
 Clear all dead flags on operands defining register Reg.
 
void setRegisterDefReadUndef (Register Reg, bool IsUndef=true)
 Mark all subregister defs of register Reg with the undef flag.
 
void addRegisterDefined (Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
 We have determined MI defines a register.
 
void setPhysRegsDeadExcept (ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
 Mark every physreg used by this instruction as dead except those in the UsedRegs list.
 
bool isSafeToMove (bool &SawStore) const
 Return true if it is safe to move this instruction.
 
bool wouldBeTriviallyDead () const
 Return true if this instruction would be trivially dead if all of its defined registers were dead.
 
bool mayAlias (AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
 Returns true if this instruction's memory access aliases the memory access of Other.
 
bool hasOrderedMemoryRef () const
 Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.
 
bool isDereferenceableInvariantLoad () const
 Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function.
 
Register isConstantValuePHI () const
 If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return Register().
 
bool hasUnmodeledSideEffects () const
 Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc.
 
bool isLoadFoldBarrier () const
 Returns true if it is illegal to fold a load across this instruction.
 
bool allDefsAreDead () const
 Return true if all the defs of this instruction are dead.
 
bool allImplicitDefsAreDead () const
 Return true if all the implicit defs of this instruction are dead.
 
std::optional< LocationSizegetSpillSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a spill instruction.
 
std::optional< LocationSizegetFoldedSpillSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a folded spill instruction.
 
std::optional< LocationSizegetRestoreSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a restore instruction.
 
std::optional< LocationSizegetFoldedRestoreSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a folded restore instruction.
 
void copyImplicitOps (MachineFunction &MF, const MachineInstr &MI)
 Copy implicit register operands from specified instruction to this instruction.
 
void addOperand (MachineFunction &MF, const MachineOperand &Op)
 Add the specified operand to the instruction.
 
void addOperand (const MachineOperand &Op)
 Add an operand without providing an MF reference.
 
void insert (mop_iterator InsertBefore, ArrayRef< MachineOperand > Ops)
 Inserts Ops BEFORE It. Can untie/retie tied operands.
 
void setDesc (const MCInstrDesc &TID)
 Replace the instruction descriptor (thus opcode) of the current instruction with a new one.
 
void setDebugLoc (DebugLoc DL)
 Replace current source information with new such.
 
void removeOperand (unsigned OpNo)
 Erase an operand from an instruction, leaving it with one fewer operand than it started with.
 
void dropMemRefs (MachineFunction &MF)
 Clear this MachineInstr's memory reference descriptor list.
 
void setMemRefs (MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
 Assign this MachineInstr's memory reference descriptor list.
 
void addMemOperand (MachineFunction &MF, MachineMemOperand *MO)
 Add a MachineMemOperand to the machine instruction.
 
void cloneMemRefs (MachineFunction &MF, const MachineInstr &MI)
 Clone another MachineInstr's memory reference descriptor list and replace ours with it.
 
void cloneMergedMemRefs (MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
 Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it.
 
void setPreInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
 Set a symbol that will be emitted just prior to the instruction itself.
 
void setPostInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
 Set a symbol that will be emitted just after the instruction itself.
 
void cloneInstrSymbols (MachineFunction &MF, const MachineInstr &MI)
 Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.
 
void setHeapAllocMarker (MachineFunction &MF, MDNode *MD)
 Set a marker on instructions that denotes where we should create and emit heap alloc site labels.
 
void setPCSections (MachineFunction &MF, MDNode *MD)
 
void setMMRAMetadata (MachineFunction &MF, MDNode *MMRAs)
 
void setCFIType (MachineFunction &MF, uint32_t Type)
 Set the CFI type for the instruction.
 
uint32_t mergeFlagsWith (const MachineInstr &Other) const
 Return the MIFlags which represent both MachineInstrs.
 
void copyIRFlags (const Instruction &I)
 Copy all flags to MachineInst MIFlags.
 
void untieRegOperand (unsigned OpIdx)
 Break any tie involving OpIdx.
 
void addImplicitDefUseOperands (MachineFunction &MF)
 Add all implicit def and use operands to this instruction.
 
void collectDebugValues (SmallVectorImpl< MachineInstr * > &DbgValues)
 Scan instructions immediately following MI and collect any matching DBG_VALUEs.
 
void changeDebugValuesDefReg (Register Reg)
 Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.
 
void setDebugValueUndef ()
 Sets all register debug operands in this debug value instruction to be undef.
 
std::tuple< Register, RegistergetFirst2Regs () const
 
std::tuple< Register, Register, RegistergetFirst3Regs () const
 
std::tuple< Register, Register, Register, RegistergetFirst4Regs () const
 
std::tuple< Register, Register, Register, Register, RegistergetFirst5Regs () const
 
std::tuple< LLT, LLTgetFirst2LLTs () const
 
std::tuple< LLT, LLT, LLTgetFirst3LLTs () const
 
std::tuple< LLT, LLT, LLT, LLTgetFirst4LLTs () const
 
std::tuple< LLT, LLT, LLT, LLT, LLTgetFirst5LLTs () const
 
std::tuple< Register, LLT, Register, LLTgetFirst2RegLLTs () const
 
std::tuple< Register, LLT, Register, LLT, Register, LLTgetFirst3RegLLTs () const
 
std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLTgetFirst4RegLLTs () const
 
std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLTgetFirst5RegLLTs () const
 
LLT getTypeToPrint (unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
 Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.
 
bool hasComplexRegisterTies () const
 Return true when an instruction has tied register that can't be determined by the instruction's descriptor.
 
void print (raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
 Print this MI to OS.
 
void print (raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
 
void dump () const
 
void dumpr (const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
 Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth.
 
- Public Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
MachineInstrgetPrevNode ()
 
const MachineInstrgetPrevNode () const
 Get the previous node, or nullptr for the list head.
 
MachineInstrgetNextNode ()
 Get the next node, or nullptr for the list tail.
 
const MachineInstrgetNextNode () const
 Get the next node, or nullptr for the list tail.
 
- Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
self_iterator getIterator ()
 
const_self_iterator getIterator () const
 
reverse_self_iterator getReverseIterator ()
 
const_reverse_self_iterator getReverseIterator () const
 
bool isSentinel () const
 Check whether this is the sentinel node.
 
- Public Member Functions inherited from llvm::ilist_detail::node_parent_access< NodeTy, ParentTy >
const ParentTy * getParent () const
 
ParentTy * getParent ()
 
void setParent (ParentTy *Parent)
 
- Protected Types inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
using self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, false, false >::type
 
using const_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, false, true >::type
 
using reverse_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, true, false >::type
 
using const_reverse_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, true, true >::type
 
- Protected Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
 ilist_node_with_parent ()=default
 
- Protected Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
 ilist_node_impl ()=default
 

Detailed Description

Represents either a G_SEXTLOAD or G_ZEXTLOAD.

Definition at line 213 of file GenericMachineInstrs.h.

Member Function Documentation

◆ classof()

static bool llvm::GExtLoad::classof ( const MachineInstr MI)
inlinestatic

Definition at line 215 of file GenericMachineInstrs.h.

References MI.


The documentation for this class was generated from the following file: