llvm::HexagonRegisterInfo Class Reference

#include "Target/Hexagon/HexagonRegisterInfo.h"

Inheritance diagram for llvm::HexagonRegisterInfo:

Public Member Functions
	HexagonRegisterInfo (unsigned HwMode)
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
	Code Generation virtual methods...
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
BitVector	getReservedRegs (const MachineFunction &MF) const override
bool	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
	Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
	Returns true.
bool	useFPForScavengingIndex (const MachineFunction &MF) const override
	Returns true if the frame pointer is valid.
bool	shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
Register	getFrameRegister (const MachineFunction &MF) const override
Register	getFrameRegister () const
Register	getStackRegister () const
unsigned	getHexagonSubRegIndex (const TargetRegisterClass &RC, unsigned GenIdx) const
const MCPhysReg *	getCallerSavedRegs (const MachineFunction *MF, const TargetRegisterClass *RC) const
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
bool	isEHReturnCalleeSaveReg (Register Reg) const

Detailed Description

Definition at line 29 of file HexagonRegisterInfo.h.

Constructor & Destructor Documentation

HexagonRegisterInfo()

HexagonRegisterInfo::HexagonRegisterInfo

(

unsigned

HwMode

)

Definition at line 51 of file HexagonRegisterInfo.cpp.

Member Function Documentation

eliminateFrameIndex()

bool HexagonRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II, int  SPAdj, unsigned  FIOperandNum, RegScavenger *  RS = nullptr  ) const

override

Definition at line 203 of file HexagonRegisterInfo.cpp.

References llvm::LiveRegUnits::accumulateUsedDefed(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), DL, FrameIndexReuseLimit, FrameIndexSearchRange, llvm::HexagonSubtarget::getInstrInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), I, II, llvm::SmallSet< T, N, C >::insert(), llvm::MachineInstr::isCall(), MI, MRI, llvm::Offset, llvm::MachineInstr::operands(), llvm::MachineBasicBlock::rend(), llvm::SmallSet< T, N, C >::size(), and Uses.

getCalleeSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCalleeSavedRegs ( const MachineFunction *  MF ) const

override

Code Generation virtual methods...

Definition at line 114 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getInfo().

Referenced by llvm::HexagonFrameLowering::determineCalleeSaves(), and llvm::HexagonDAGToDAGISel::emitFunctionEntryCode().

getCallerSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCallerSavedRegs	(	const MachineFunction *	MF,
		const TargetRegisterClass *	RC
	)		const

Definition at line 62 of file HexagonRegisterInfo.cpp.

References llvm::dbgs(), llvm::TargetRegisterClass::getID(), Int32, Int64, llvm_unreachable, R2, R4, and R6.

Referenced by needToReserveScavengingSpillSlots().

getCallPreservedMask()

const uint32_t * HexagonRegisterInfo::getCallPreservedMask ( const MachineFunction &  MF, CallingConv::ID    ) const

override

Definition at line 136 of file HexagonRegisterInfo.cpp.

Referenced by llvm::HexagonTargetLowering::LowerCall().

getFrameRegister() [1/2]

Register HexagonRegisterInfo::getFrameRegister

(

)

const

Definition at line 406 of file HexagonRegisterInfo.cpp.

Referenced by getFrameRegister().

getFrameRegister() [2/2]

Register HexagonRegisterInfo::getFrameRegister ( const MachineFunction &  MF ) const

override

Definition at line 397 of file HexagonRegisterInfo.cpp.

References getFrameRegister(), getStackRegister(), and llvm::TargetFrameLowering::hasFP().

Referenced by llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::HexagonPacketizerList::isCallDependent(), and llvm::HexagonTargetLowering::LowerFRAMEADDR().

getHexagonSubRegIndex()

unsigned HexagonRegisterInfo::getHexagonSubRegIndex	(	const TargetRegisterClass &	RC,
		unsigned	GenIdx
	)		const

Definition at line 416 of file HexagonRegisterInfo.cpp.

References assert(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::empty(), getHexagonSubRegIndex(), llvm::TargetRegisterClass::getID(), getRegClass(), llvm_unreachable, llvm::Hexagon::ps_sub_hi, llvm::Hexagon::ps_sub_lo, and llvm::TargetRegisterClass::superclasses().

Referenced by getHexagonSubRegIndex().

getPointerRegClass()

const TargetRegisterClass * HexagonRegisterInfo::getPointerRegClass ( const MachineFunction &  MF, unsigned  Kind = 0  ) const

override

Definition at line 447 of file HexagonRegisterInfo.cpp.

getReservedRegs()

BitVector HexagonRegisterInfo::getReservedRegs ( const MachineFunction &  MF ) const

override

Definition at line 142 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::Hexagon_MC::GetVectRegRev(), llvm::HexagonSubtarget::hasReservedR19(), llvm::Register::isValid(), and llvm::Reserved.

Referenced by llvm::HexagonDAGToDAGISel::emitFunctionEntryCode().

getStackRegister()

Register HexagonRegisterInfo::getStackRegister

(

)

const

Definition at line 411 of file HexagonRegisterInfo.cpp.

Referenced by llvm::HexagonInstrInfo::getDuplexCandidateGroup(), getFrameRegister(), llvm::HexagonPacketizerList::isCallDependent(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), and llvm::HexagonTargetLowering::LowerCall().

isEHReturnCalleeSaveReg()

bool HexagonRegisterInfo::isEHReturnCalleeSaveReg

(

Register

Reg

)

const

Definition at line 56 of file HexagonRegisterInfo.cpp.

requiresFrameIndexScavenging()

bool llvm::HexagonRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction &  MF ) const

inlineoverride

Returns true.

Spill code for predicate registers might need an extra register.

Definition at line 52 of file HexagonRegisterInfo.h.

requiresRegisterScavenging()

bool llvm::HexagonRegisterInfo::requiresRegisterScavenging ( const MachineFunction &  MF ) const

inlineoverride

Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.

Definition at line 46 of file HexagonRegisterInfo.h.

shouldCoalesce()

bool HexagonRegisterInfo::shouldCoalesce ( MachineInstr *  MI, const TargetRegisterClass *  SrcRC, unsigned  SubReg, const TargetRegisterClass *  DstRC, unsigned  DstSubReg, const TargetRegisterClass *  NewRC, LiveIntervals &  LIS  ) const

override

Definition at line 348 of file HexagonRegisterInfo.cpp.

References llvm::any_of(), llvm::TargetRegisterClass::getID(), llvm::SlotIndexes::getInstructionFromIndex(), llvm::LiveIntervals::getInterval(), llvm::LiveIntervals::getSlotIndexes(), llvm::MachineFunction::getSubtarget(), I, MI, and llvm::HexagonSubtarget::useHVXOps().

useFPForScavengingIndex()

bool HexagonRegisterInfo::useFPForScavengingIndex ( const MachineFunction &  MF ) const

override

Returns true if the frame pointer is valid.

Definition at line 441 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

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The documentation for this class was generated from the following files:

• lib/Target/Hexagon/HexagonRegisterInfo.h
• lib/Target/Hexagon/HexagonRegisterInfo.cpp