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14 #ifndef LLVM_MCA_HARDWAREUNITS_SCHEDULER_H
15 #define LLVM_MCA_HARDWAREUNITS_SCHEDULER_H
43 int computeRank(
const InstRef &Lhs)
const {
52 int LhsRank = computeRank(Lhs);
53 int RhsRank = computeRank(Rhs);
57 if (LhsRank == RhsRank)
59 return LhsRank < RhsRank;
74 std::unique_ptr<SchedulerStrategy> Strategy;
77 std::unique_ptr<ResourceManager> Resources;
111 std::vector<InstRef> WaitSet;
112 std::vector<InstRef> PendingSet;
113 std::vector<InstRef> ReadySet;
114 std::vector<InstRef> IssuedSet;
121 uint64_t BusyResourceUnits;
125 unsigned NumDispatchedToThePendingSet;
134 void initializeStrategy(std::unique_ptr<SchedulerStrategy>
S);
137 void issueInstructionImpl(
161 std::unique_ptr<SchedulerStrategy> SelectStrategy)
166 std::unique_ptr<SchedulerStrategy> SelectStrategy)
167 : LSU(Lsu), Resources(
std::
move(
RM)), BusyResourceUnits(0),
168 NumDispatchedToThePendingSet(0), HadTokenStall(
false) {
169 initializeStrategy(
std::move(SelectStrategy));
235 return Resources->resolveResourceMask(
Mask);
279 #endif // LLVM_MCA_HARDWAREUNITS_SCHEDULER_H
Class Scheduler is responsible for issuing instructions to pipeline resources.
bool dispatch(InstRef &IR)
Reserves buffer and LSUnit queue resources that are necessary to issue this instruction.
This class represents lattice values for constants.
void analyzeDataDependencies(SmallVectorImpl< InstRef > &RegDeps, SmallVectorImpl< InstRef > &MemDeps)
This method is called by the ExecuteStage at the end of each cycle to identify bottlenecks caused by ...
Default instruction selection strategy used by class Scheduler.
A resource manager for processor resource units and groups.
Scheduler(std::unique_ptr< ResourceManager > RM, LSUnitBase &Lsu, std::unique_ptr< SchedulerStrategy > SelectStrategy)
Scheduler(const MCSchedModel &Model, LSUnitBase &Lsu, std::unique_ptr< SchedulerStrategy > SelectStrategy)
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
unsigned getResourceID(uint64_t Mask) const
Convert a resource mask into a valid llvm processor resource identifier.
Instruction * getInstruction()
DefaultSchedulerStrategy()=default
unsigned getSourceIndex() const
Abstract base interface for LS (load/store) units in llvm-mca.
bool mustIssueImmediately(const InstRef &IR) const
Returns true if IR has to be issued immediately, or if IR is a zero latency instruction.
uint64_t analyzeResourcePressure(SmallVectorImpl< InstRef > &Insts)
Returns a mask of busy resources, and populates vector Insts with instructions that could not be issu...
Statically lint checks LLVM IR
unsigned getNumUsers() const
bool hadTokenStall() const
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
bool isWaitSetEmpty() const
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
An InstRef contains both a SourceMgr index and Instruction pair.
void issueInstruction(InstRef &IR, SmallVectorImpl< std::pair< ResourceRef, ResourceCycles >> &Used, SmallVectorImpl< InstRef > &Pending, SmallVectorImpl< InstRef > &Ready)
Issue an instruction and populates a vector of used pipeline resources, and a vector of instructions ...
bool compare(const InstRef &Lhs, const InstRef &Rhs) const override
Returns true if Lhs should take priority over Rhs.
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
@ SC_DISPATCH_GROUP_STALL
Status isAvailable(const InstRef &IR)
Check if the instruction in 'IR' can be dispatched during this cycle.
InstRef select()
Select the next instruction to issue from the ReadySet.
Machine model for scheduling, bundling, and heuristics.
Scheduler(const MCSchedModel &Model, LSUnitBase &Lsu)
SchedulerStrategy()=default
virtual ~DefaultSchedulerStrategy()
virtual bool compare(const InstRef &Lhs, const InstRef &Rhs) const =0
Returns true if Lhs should take priority over Rhs.
virtual ~SchedulerStrategy()
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void sanityCheck(const InstRef &IR) const
void cycleEvent(SmallVectorImpl< ResourceRef > &Freed, SmallVectorImpl< InstRef > &Executed, SmallVectorImpl< InstRef > &Pending, SmallVectorImpl< InstRef > &Ready)
This routine notifies the Scheduler that a new cycle just started.
bool isReadySetEmpty() const